6-20

Messages and Beep Codes

Whenever a recoverable error occurs during POST, BIOS displays a message on the video display screen and causes the speaker to beep twice as the message appears. BIOS also issues a beep code (one long tone followed by two short tones) during POST if the video configuration fails or if an external ROM module does not checksum to zero.

At the beginning of each POST test routine, the BIOS outputs the test point error code to I/O address 80h. If the BIOS detects a terminal error condition, it halts POST after issuing a terminal error beep code signifying the test point code and attempting to display the test point error code on the upper left corner of the display screen. BIOS derives the beep code from the test point error code as follows:

1.The 8-bit hexadecimal error code is broken down to four 2-bit groups.

2.Each group is made one-based by adding one.

3.Short beeps are generated for the number in each group.

For example, a test point error code of 16 is indicated by a 1-2-2-3 beep code (a single beep, a burst of two beeps, a burst of two beeps, and a burst of three beeps). In addition, BIOS writes a value of 16 on the upper left corner of the display screen and to I/O port 80h to enable debugging tools to identify the area of failure.

Table 6-3 is a list of the test point error codes written at the start of each POST test and the beep codes issued for terminal errors.

Problem Solving

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Zenith Data Systems MT2000 manual Messages and Beep Codes