Intel IXC1100, IXP42X 18.3.3 Field Formats

Intel® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB)
v1.1 Device Controller
Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
472 Order Number: 252480-006US
Each time a 0 occurs, the receiver logic synchronizes the baud clock to the incoming
data (thus producing the clock). To ensure the receiver is periodically synchronized,
any time six consecutive 1s are detected in the serial bit stream, a 0 is automatically
inserted by the transmitter. This procedure is known as “bit stuffing.” The receiver logic,
in turn, automatically detects stuffed bits and removes them from the incoming data.
Bit stuffing causes a transition on the incoming signal at least once every 7 bit-times to
guarantee baud-clock lock. Bit stuffing is enabled for an entire packet beginning when
the start of packet is detected and maintained until the end of packet is detected
(enabled during the sync field all the way through the CRC field). Figure 96 shows the
NRZI encoding of the data byte 0b1101 0010.
18.3.3 Field Formats
Individual bits are assembled into groups called fields. Fields are used to construct
packets and packets are used to construct frames or transactions. There are seven USB
field types:
A Sync is preceded by the Idle state and is the first field of every packet. The first bit of
a Sync field signals the SOP to the UDC or host. A Sync is 8 bits wide and consists of
seven 0s, followed by a 1 (0x80). Bits are transmitted to the bus least-significant-bit-
first in every field, except the CRC field.
The PID is 1 byte wide and always follows the sync field. The first four bits contain an
encoded value that represents packet type (Token, Data, Handshake, and Special),
packet format, and type of error detection. The last four bits contain a check field that
ensures the PID is transmitted without errors.
The check field is generated by performing a 1s complement of the PID. The UDC XORs
the PID and CRC fields and takes the action prescribed in the USB standard if the result
does not contain all ones, which indicates an error has occurred in transmission.
The Address and Endpoint fields are used to access the UDC’s 16 endpoints. The
Address field contains seven bits and permits 127 unique devices to be placed on the
USB. After the USB host signals a reset, the UDC and all other devices are assigned the
default address, 0.
Figure 96. NRZI Bit Encoding Example
•Sync •PID •Address
• Endpoint • Frame Number • Data
•CRC