Intel IXC1100, IXP42X 8.7 Special Design Knowledge for Using HPI mode

Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 303
Expansion Bus Controller—Intel® IXP42X product line and IXC1100 control plane processors
8.7 Special Design Knowledge for Using HPI mode
The Expansion Bus Controller supports a number of the 8-bit and 16-bit versions of the
Texas Instruments Host Port Interface (HPI) standards. This flexibility allows the
TMS320C54xx family of Digital Signals Processors (DSP) to seamlessly interface to the
IXP42X product line and IXC1100 control plane processors Expansion Bus.
If the Expansion Bus CS (Chip-Select) is configured to operate to operate in HPI-8
Mode, then a STRH (16-bit write) Intel XScale processor instruction must be used for
writing to the HPI-8 device, even though it is in an 8-bit device. If a STRB (8-bit write)
instruction is used instead, then the Intel XScale processor’s data abort handler will be
initiated, causing the assigned HPI-8 CS signal to deassert.
However, there are some special things to note when using the Expansion Bus in HPI
mode of operation. These features are shown in the following tables.
The expansion-bus address-pins bits 0, 1, 2, 22, and 23 are multiplexed with special
function signal pins for HPI as shown in Table120.
Figure 62. I/O Wait Extended Phase Timing
EX_CLK
EX_CS_N[0]
EX_ADDR[23:0]
EX_RD_N
EX_DATA[15:0] Valid Data
Valid Address
4 Cycles 4 Cycles 16 Cycles 16 Cycles
T1=3 h T2=3 h T3=F h T4=3 h T5=F h
EX_IOWAIT_N
B5243-01
....
4 Cycles
....
2 Cycles
Table 120. Multiplexed Output Pins for HPI Operation
HPI Control Signal Output Signal Pin
EX_HBIL EX_ADDR [0]
EX_HCNTL [1:0] EX_ADDR [2:1]
EX_HCSEL [1:0] EX_ADDR [23:22]