Intel IXC1100, IXP42X 3.9 Performance Considerations

Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 159
Intel XScale® Processor—Intel® IXP42X product line and IXC1100 control plane processors
3.8.3.4.6 Debug Events
Debug events are covered in “Debug Exceptions” on page92.
3.9 Performance Considerations
This section describes relevant performance considerations that compiler writers,
application programmers and system designers need to be aware of to efficiently use
the IXP42X product line and IXC1100 control plane processors. Performance numbers
discussed here include interrupt latency, branch prediction, and instruction latencies.
3.9.1 Interrupt Latency
Minimum Interrupt Latency is defined as the minimum number of cycles from the
assertion of any interrupt signal (IRQ or FIQ) to the execution of the instruction at the
vector for that interrupt. This number assumes best case conditions exist when the
interrupt is asserted, e.g., the system isn’t waiting on the completion of some other
operation.
A sometimes more useful number to work with is the Maximum Interrupt Latency. This
is typically a complex calculation that depends on what else is going on in the system
at the time the interrupt is asserted. Some examples that can adversely affect interrupt
latency are:
• The instruction currently executing could be a 16-register LDM
• The processor could fault just when the interrupt arrives
• The processor could be waiting for data from a load, doing a page table walk, etc.
• High core-to-system (bus) clock ratios
Example 19. Speculatively issuing PLD
;; R0 points to a node in a linked list. A node has the following layout:
;; Offset Contents
;;----------------------------------
;; 0 data
;; 4 pointer to next node
;; This code computes the sum of all nodes in a list. The sum is placed into R9.
;;
MOV R9, #0 ; Clear accumulator
sumList:
LDR R1, [R0, #4] ; R1 gets pointer to next node
LDR R3, [R0] ; R3 gets data from current node
PLD [R1] ; Speculatively start load of next node
ADD R9, R9, R3 ; Add into accumulator
MOVS R0, R1 ; Advance to next node. At end of list?
BNE sumList ; If not then loop