Intel® IXP42X product line and IXC1100 control plane processors—High-Speed Serial
Interfaces
Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
452 Order Number: 252480-006US
The frame-sync signal is used to allow the HSS interface to synchronize to external
devices. The synchronization is obtained by the activity produced on the frame-sync
signals. There is a separate frame-sync signal for both transmit and receive for each
HSS interface. Using Intel supplied APIs, the HSS frame-sync signals can be
programmed to be inputs or outputs.
The APIs also allow the user the ability to select the detection mechanism by which the
devices will synchronize. The frame-sync signals can be configured to detect/produce a
frame-sync signal in one of four ways:
If the frame-sync signal is configured as an output and is active-low production, the
frame-sync signal will output logic l and then assert the frame-sync signal to logic 0 for
one clock as defined by the frame-sync offset value. If the frame-sync signal is
configured as an input and is active-low detection, the frame-sync signal will signal a
detected frame-sync signal when the received frame-sync signal goes from logic l to
logic 0 for one clock in the appropriate frame-sync offset location.
If the frame-sync signal is configured as an output and is active-high production, the
frame-sync signal will output logic 0 and then assert the frame-sync signal to logic 1 for
one clock as defined by the frame-sync offset value. If the frame-sync signal is
configured as an input and is active-high detection, the frame-sync signal will signal a
detected frame-sync signal when the received frame-sync signal goes from logic 0 to
logic 1 for one clock in the appropriate frame-sync offset location.
If the frame-sync signal is configured as an output and as falling-edge production, the
frame-sync signal will output logic l and then assert the frame-sync signal to logic 0 for
one clock as defined by the frame-sync offset value on the falling edge of the clock. If
the frame-sync signal is configured as an input and as falling-edge detection, the
frame-sync signal will signal a detected frame-sync primitive when the received frame-
sync signal goes from logic l to logic 0 at the appropriate frame-sync offset location.
If the frame-sync signal is configured as an output and as rising-edge production, the
frame-sync signal will output logic 0 and then assert the frame-sync signal to logic 1 for
one clock as defined by the frame-sync offset value on the rising edge of the clock. If
the frame-sync signal is configured as an input and as rising-edge detection, the frame-
sync signal will signal a detected frame-sync primitive when the received frame-sync
signal goes from logic 0 to logic 1 at the appropriate frame-sync offset location.
The frame-sync offset defines the relation of the frame-sync pulse to the start of the
data. The frame-sync pulse can be programmed as a value between 0 and 1,023 bits,
using Intel-supplied APIs running on the Intel XScale processor.
If an offset is programmed, the data transmitted will be transmitted the offset number
of clock cycles prior to the production/detection of the transmission frame-sync signal.
For received data, the first data time slot will be received an offset number of clock
cycles prior to the production/detection of the receive frame-sync signal.
Loop-back is a debug function that can be used to deduce and debug problems
observed when using the HSS interface. Loop back can help isolate a problem by
eliminating parts externally connected to the HSS interface as a source of the problem.
If the system works correctly in loop-back mode, an indication is given that any
problem is most-likely within the devices externally connected to the HSS interface.
All transmit and receive FIFOs should be empty before loop back is entered. The HSS
interface must synchronize to the frame-sync pulse before any operations commence,
as in normal mode of operation.
Active-low detection/production Active-high detection/production
Falling-edge detection/
production Rising-edge detection/production