Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

30-28

EPC Command (EPC_CMD)

R/W

000b

 

This field is used to issue commands to the EEPROM controller. The EPC

 

 

 

will execute commands when the EPC Busy bit is set. A new command must

 

 

 

not be issued until the previous command completes.

 

 

 

This field is encoded as follows:

 

 

 

[30:28] = 000;

 

 

 

READ (Read Location): This command will cause a read of the EEPROM

 

 

 

location pointed to by EPC Address. The result of the read is available in the

 

 

 

E2P_DATA register.

 

 

 

[30:28] = 001;

 

 

 

EWDS (Erase/Write Disable): After issued, the EEPROM will ignore erase

 

 

 

and write commands. To re-enable erase/write operations issue the EWEN

 

 

 

command.

 

 

[30:28] = 010;

EWEN (Erase/Write Enable): Enables the EEPROM for erase and write operations. The EEPROM will allow erase and write operations until the Erase/Write Disable command is sent, or until power is cycled.

 

Note:

The EEPROM device will power-up in the erase/write-disabled

 

 

 

 

state. Any erase or write operations will fail until an Erase/Write

 

 

 

 

Enable command is issued.

 

 

 

[30:28] = 011;

 

 

 

WRITE (Write Location): If erase/write operations are enabled in the

 

 

 

EEPROM, this command will cause the contents of the E2P_DATA register

 

 

 

to be written to the EEPROM location selected by the EPC Address field.

 

 

 

[30:28] = 100;

 

 

 

WRAL (Write All): If erase/write operations are enabled in the EEPROM,

 

 

 

this command will cause the contents of the E2P_DATA register to be written

 

 

 

to every EEPROM memory location.

 

 

 

[30:28] = 101;

 

 

 

ERASE (Erase Location): If erase/write operations are enabled in the

 

 

 

EEPROM, this command will erase the location selected by the EPC

 

 

 

Address field.

 

 

 

[30:28] = 110;

 

 

 

ERAL (Erase All): If erase/write operations are enabled in the EEPROM,

 

 

 

this command will initiate a bulk erase of the entire EEPROM.

 

 

 

[30:28] = 111;

 

 

 

RELOAD (EEPROM Reload): Instructs the EEPROM controller to reload the

 

 

 

MAC address and SSVID/SSID from the EEPROM. If a value of 0xA5 is not

 

 

 

found in the first address of the EEPROM, the EEPROM is assumed to be

 

 

 

unprogrammed and EEPROM Reload operation will fail. The ’EEPROM

 

 

 

Loaded’ bit indicates a successful load of the MAC address and

 

 

 

SSVID/SSID.

 

 

 

 

 

 

27:10

RESERVED

RO

-

 

 

 

 

9

EPC Time-out (EPC_TO)

R/WC

0b

 

If an EEPROM operation is performed, and there is no response from the

 

 

 

EEPROM within 30mS, the EEPROM controller will timeout and return to its

 

 

 

idle state. This bit is set when a time-out occurs indicating that the last

 

 

 

operation was unsuccessful.

 

 

 

Note:

If the EEDIO signal pin is externally pulled-high, EPC commands

 

 

 

 

will not time out if the EEPROM device is missing. In this case the

 

 

 

 

EPC Busy bit will be cleared as soon as the command sequence

 

 

 

 

is complete. It should also be noted that the ERASE, ERAL, WRITE

 

 

 

 

and WRAL commands are the only EPC commands that will time-

 

 

 

 

out if an EEPROM device is not present -and- the EEDIO signal is

 

 

 

 

pulled low.

 

 

Revision 1.22 (09-25-08)

100

SMSC LAN9420/LAN9420i

 

DATASHEET