Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

4.5.10Special Control/Status Indications

 

Index (In Decimal): 27

Size:

16 bits

 

 

 

 

 

 

 

 

BITS

DESCRIPTION

 

 

TYPE

DEFAULT

 

 

 

 

 

 

15

Override AUTOMDIX_EN Strap

 

 

R/W

0b

 

0 = AUTOMDIX_EN configuration strap enables or disables HP Auto MDIX.

 

 

 

1 = Override AUTOMDIX_EN configuration strap. PHY Register 27.14 and

 

 

 

27.13 determine MDIX function.

 

 

 

 

 

 

 

 

 

 

14

Auto-MDIX Enable

 

 

R/W

0b

 

Only effective when 27.15=1, otherwise ignored.

 

 

 

 

 

0 = Disable Auto-MDIX. 27.13 determines normal or reversed connection.

 

 

 

1 = Enable Auto-MDIX. 27.13 must be set to 0.

 

 

 

 

 

 

 

 

 

 

13

Auto-MDIX State

 

 

R/W

0b

 

Only effective when 27.15=1, otherwise ignored.

 

 

 

 

 

When 27.14 = 0 (manually set MDIX state):

 

 

 

 

 

0 = no crossover (TPO = output, TPI = input)

 

 

 

 

1 = crossover (TPO = input, TPI = output)

 

 

 

 

 

When 27.14 = 1 (automatic MDIX) this bit must be set to 0.

 

 

 

 

Do not use the combination 27.15=1, 27.14=1, 27.13=1.

 

 

 

 

 

 

 

 

 

12:11

RESERVED

 

 

RO

-

 

 

 

 

 

 

10

VCOOFF_LP

 

 

R/W,

0b

 

Forces the Receive PLL 10M to lock on the reference clock at all times: 0

NASR

 

 

– Receive PLL 10M can lock on reference or line as needed (normal

 

 

 

operation) 1 - Receive PLL 10M is locked on the reference clock. In this

 

 

 

mode 10M data packets cannot be received.

 

 

 

 

 

 

 

 

 

 

9:5

RESERVED

 

 

RO

-

 

 

 

 

 

 

4

XPOL

 

 

RO

0b

 

Polarity state of the 10BASE-T:

 

 

 

 

 

0 – Normal polarity

 

 

 

 

 

1 – Reversed polarity

 

 

 

 

 

 

 

 

 

 

3:0

RESERVED

 

 

RO

-

 

 

 

 

 

 

SMSC LAN9420/LAN9420i

145

Revision 1.22 (09-25-08)

 

DATASHEET