Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

Table 2.5 PLL and Ethernet PHY Pins

NUM

 

 

BUFFER

 

PINS

NAME

SYMBOL

TYPE

DESCRIPTION

 

 

 

 

 

 

Crystal Input

XI

ICLK

Crystal Input: External 25MHz crystal input. This pin

1

 

 

 

can also be driven by a single-ended clock oscillator.

 

 

 

When this method is used, XO should be left

 

 

 

 

 

 

 

 

unconnected.

 

 

 

 

 

1

Crystal

XO

OCLK

Crystal Output: External 25MHz crystal output.

Output

 

 

 

 

 

 

 

 

 

 

 

 

 

Ethernet TX

TPO-

AIO

Ethernet Transmit Data Out Negative: The transmit

1

Data Out

 

 

data outputs may be swapped internally with receive

 

Negative

 

 

data inputs when Auto-MDIX is enabled.

 

 

 

 

 

 

Ethernet TX

TPO+

AIO

Ethernet Transmit Data Out Positive: The transmit

1

Data Out

 

 

data outputs may be swapped internally with receive

 

Positive

 

 

data inputs when Auto-MDIX is enabled.

 

 

 

 

 

 

Ethernet RX

TPI-

AIO

Ethernet Receive Data In Negative: The receive data

1

Data In

 

 

inputs may be swapped internally with transmit data

 

Negative

 

 

outputs when Auto-MDIX is enabled.

 

 

 

 

 

 

Ethernet RX

TPI+

AIO

Ethernet Receive Data In Positive: The receive data

1

Data In

 

 

inputs may be swapped internally with transmit data

 

Positive

 

 

outputs when Auto-MDIX is enabled.

 

 

 

 

 

 

External

EXRES

AI

External PHY Bias Resistor: Used for the internal

1

PHY Bias

 

 

PHY bias circuits. Connect to an external 12.4K 1.0%

 

Resistor

 

 

resistor to ground.

 

 

 

 

 

SMSC LAN9420/LAN9420i

19

Revision 1.22 (09-25-08)

 

DATASHEET