Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

 

 

 

Datasheet

 

Receive Descriptor 1 (RDES1)

 

 

 

Table 3.6 RDES1 Bit Fields

 

 

 

 

BITS

 

 

DESCRIPTION

 

 

 

 

31:26

 

 

RESERVED

 

 

 

Host Actions: Cleared on writes and ignored on reads.

 

 

 

DMAC Actions: Ignored on reads. DMAC does not write to RDES1.

 

 

 

 

25

 

 

RER - Receive End of Ring

 

 

 

When set, indicates that the DMAC reached the final descriptor. Upon servicing this descriptor,

 

 

 

the DMAC returns to the base address of the DMA descriptor list pointed to by the Receive List

 

 

 

Base Address Register (RX_BASE_ADDR).

 

 

 

Host Actions: Initializes this bit.

 

 

 

DMAC Actions: Reads this bit to determine if this is the final descriptor in the ring.

 

 

 

 

24

 

 

RCH - Second Address Chained

 

 

 

When set, indicates that the second address in the descriptor is the next descriptor address,

 

 

 

rather than the second buffer address. When RCH is set, RBS2 (RDES1[21:11]) must be all

 

 

 

zeros. RCH is ignored if RER (RDES1[25]) is set.

 

 

 

Host Actions: Initializes this bit.

 

 

 

DMAC Actions: Reads this bit to determine if second address is next descriptor address.

 

 

 

 

23:22

 

 

RESERVED

 

 

 

Host Actions: Cleared on writes and ignored on reads.

 

 

 

DMAC Actions: Ignored on reads. DMAC does not write to RDES1.

 

 

 

 

21:11

 

 

RBS2 - Receive Buffer 2 Size

 

 

 

Indicates the size, in bytes, of the second data buffer. The buffer size must be a multiple of 4.

 

 

 

This field is not valid if RCH (RDES1[24]) is set.

 

 

 

Host Actions: Initializes this field.

 

 

 

DMAC Actions: Reads this field to determine the allocated size of associated data buffer.

 

 

 

 

10:0

 

 

RBS1 - Receive Buffer 1 Size

 

 

 

Indicates the size, in bytes, of the first data buffer. The buffer size must be a multiple of 4. In the

 

 

 

case the buffer size is not a multiple of 4, the resulting behavior is undefined. If this field is 0,

 

 

 

the DMA controller ignores this buffer and uses buffer2. (This field cannot be zero if the

 

 

 

descriptor chaining is used – Second Address Chained (RCH - RDES1[24]) is set).

 

 

 

Host Actions: Initializes this field.

 

 

 

DMAC Actions: Reads this field to determine the allocated size of associated data buffer.

 

 

 

 

 

Receive Descriptor 2 (RDES2)

 

 

 

Table 3.7 RDES2 Bit Fields

 

 

 

 

BITS

 

 

DESCRIPTION

 

 

 

 

31:0

 

 

Buffer 1 Address Pointer

 

 

 

Indicates the address of buffer 1 in the Host memory. There are no limitations on the buffer

 

 

 

address alignment.

 

 

 

Host Actions: Initializes this field.

 

 

 

DMAC Actions: Reads this field upon opening a new DMA descriptor to obtain the buffer

 

 

 

address.

 

 

 

 

Revision 1.22 (09-25-08)

44

SMSC LAN9420/LAN9420i

 

DATASHEET