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Datasheet
4.2.8Bus Master Bridge Configuration Register (BUS_CFG)
| Offset: | 00DCh | Size: | 32 bits |
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| This register determines the bus arbitration characteristics for the RX and TX DMA engines. | |||||
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| TYPE | DEFAULT |
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31:28 | RESERVED |
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| RO | - |
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27 | RESERVED |
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| R/W | 0b |
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26:25 | RX/TX Arbitration Priority Select (CSR_RXTXWEIGHT) |
| R/W | 00b | ||
| This field selects the arbitration priority ratio for receive and transmit DMA |
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| operations. This field has no effect unless the BAR bit in the BUS_MODE |
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| DCSR is cleared. |
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| Setting | Priority Ratio (RX:TX) |
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| 00b | 1:1 |
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| 01b | 2:1 |
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| 10b | 3:1 |
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| 11b | 4:1 |
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24:0 | RESERVED |
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| RO | - |
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Revision 1.22 | 96 | SMSC LAN9420/LAN9420i |
| DATASHEET |
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