Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

15

Hash Only Filtering mode (HO)

R/W

0b

 

When set, the address check Function operates in the imperfect address

 

 

 

filtering mode both for physical and multicast addresses

 

 

 

 

 

 

14

RESERVED

RO

-

 

 

 

 

13

Hash/Perfect Filtering Mode (HPFILT)

R/W

0b

 

When reset (0), LAN9420/LAN9420i will implement a perfect address filter

 

 

 

on incoming frames according the address specified in the MAC address

 

 

 

register.

 

 

 

When set (1), the address check function does imperfect address filtering

 

 

 

of multicast incoming frames according to the hash table specified in the

 

 

 

multicast hash table register.

 

 

 

If the Hash Only Filtering mode (HO) bit is set (1), then the physical (IA)

 

 

 

are imperfect filtered too. If the Hash Only Filtering mode (HO) bit is reset

 

 

 

(0), then the IA addresses are perfect address filtered according to the MAC

 

 

 

Address register.

 

 

 

 

 

 

12

Late Collision Control (LCOLL)

R/W

0b

 

When set, enables retransmission of the collided frame even after the

 

 

 

collision period (late collision). When reset, the MAC disables frame

 

 

 

transmission on a late collision. In any case, the Late Collision status is

 

 

 

appropriately updated in the Transmit Packet status.

 

 

 

 

 

 

11

Disable Broadcast Frames (BCAST)

R/W

0b

 

When set, disables the reception of broadcast frames. When reset,

 

 

 

forwards all broadcast frames to the application.

 

 

 

Note: When wake-up frame detection is enabled via the WUEN bit of the

 

 

 

Wakeup Control and Status Register (WUCSR), a broadcast

 

 

 

wake-up frame will wake-up the device despite the state of this bit.

 

 

 

 

 

 

10

Disable Retry (DISRTY)

R/W

0b

 

When set, the MAC attempts only one transmission. When a collision is

 

 

 

seen on the bus, the MAC ignores the current frame and goes to the next

 

 

 

frame and a retry error is reported in the Transmit status. When reset, the

 

 

 

MAC attempts 16 transmissions before signaling a retry error.

 

 

 

 

 

 

9

RESERVED

RO

-

 

 

 

 

8

Automatic Pad Stripping (PADSTR)

R/W

0b

 

When set, the MAC strips the pad field on all incoming frames, if the length

 

 

 

field is less than 46 bytes. The FCS field is also stripped, since it is

 

 

 

computed at the transmitting station based on the data and pad field

 

 

 

characters, and is invalid for a received frame that has had the pad

 

 

 

characters stripped. Receive frames with a 46-byte or greater length field

 

 

 

are passed to the Application unmodified (FCS is not stripped). When reset,

 

 

 

the MAC passes all incoming frames to Host memory unmodified.

 

 

 

Note: When PADSTR is enabled, the RX Checksum Offload Engine

 

 

 

must be disabled (RX_COE_EN bit of the Checksum Offload

 

 

 

Engine Control Register (COE_CR)) and vice versa. These

 

 

 

functions cannot be enabled simultaneously.

 

 

 

 

 

 

Revision 1.22 (09-25-08)

120

SMSC LAN9420/LAN9420i

 

DATASHEET