Datasheet
Table 4.10 lists the standard PCI header registers that are supported. Registers whose initial values for Subsystem Vendor ID and Subsystem Device ID, are configured from the EEPROM are indicated by ‘YES’ in the “EPROM CONFIGURABLE” column.
Table 4.10 Standard PCI Header Registers SupportedCONFIGURATION |
| READ/ |
| EEPROM | |
SPACE OFFSET | REGISTER NAME | WRITE | DEFAULT | CONFIGURABLE | |
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00h | - 01h | Vendor ID | RO | 1055h |
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02h | - 03h | Device ID | RO | E420h |
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04h | - 05h | Command | R/W | 00h |
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06h | - 07h | Status | RO, R/WC | 0410h |
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08h |
| Revision ID | RO |
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09h | - 0Bh | Class Code | RO | 020000h |
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0Ch |
| Cache Line Size | R/W | 00h |
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0Dh |
| Latency Timer | R/W | 00h |
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0Eh |
| Header Type | RO | 00h |
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0F - 1Bh | RESERVED | RO |
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1Ch - 1Fh | BAR 3 (Note 4.8) | R/W | 00000000h |
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| (For |
| (FFFFFC00h) |
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20h | - 23h | BAR 4 (Note 4.8) | R/W | 0000001h |
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| (For I/O mapped 256byte) |
| (FFFFFF01h) |
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24h | - 2Bh | RESERVED | RO |
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2Ch - 2Dh | Subsystem Vendor ID (SSVID) | RO | 1055h | YES | |
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| (Note 4.9) |
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2EH - 2Fh | Subsystem Device ID (SSID) | RO | 9420h | YES | |
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| (Note 4.9) |
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30h | - 33h | RESERVED | RO |
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34h |
| Capabilities Pointer | RO | 78h |
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35h | - 3Bh | RESERVED | RO |
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3Ch |
| Interrupt Line | R/W | 00h |
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3Dh |
| Interrupt Pin | RO | 01h |
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3Eh |
| Min_Gnt | RO | 02h |
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3Fh |
| Max_Lat | RO | 04h |
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Note 4.7 Default value is dependent on device revision.
Note 4.8 BAR3’s read back value is FFFFFC00h after writing FFFFFFFFh. BAR4’s read back value is FFFFFF01h after writing FFFFFFFFh.
Note 4.9 The Subsystem Vendor ID and Subsystem Device ID can be configured by the serial EEPROM. if no EEPROM is connected to LAN9420/LAN9420i, then the default values in the table are used.
Revision 1.22 | 150 | SMSC LAN9420/LAN9420i |
| DATASHEET |
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