Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

5.4DC Specifications

Table 5.6 I/O Buffer Characteristics

PARAMETER

SYMBOL

MINTYPMAXUNITSNOTES

 

 

 

 

 

 

 

IS Type Input Buffer

 

 

 

 

 

 

Low Input Level

VILI

-0.3

 

 

V

 

High Input Level

VIHI

 

 

3.6

V

 

Negative-Going Threshold

VILT

1.01

1.18

1.35

V

Schmitt trigger

Positive-Going Threshold

VIHT

1.39

1.6

1.8

V

Schmitt trigger

SchmittTrigger Hysteresis

VHYS

345

420

485

mV

 

(VIHT - VILT)

 

 

 

 

 

 

Input Leakage

IIN

-10

 

10

uA

Note 5.6

Input Capacitance

CIN

 

 

3

pF

 

IPCI Type Input Buffer

 

 

 

 

 

Note 5.7

Low Input Level

VILI

-0.5

 

1.08

V

 

High Input Level

VIHI

1.5

 

4.1

V

 

Input Leakage

IIN

-10

 

10

uA

Note 5.8

Input Capacitance

CIN

 

 

3

pF

 

OPCI Type Buffer

 

 

 

 

 

Note 5.7

Low Output Level

VOL

 

 

0.3

V

 

(IOUT=500uA)

 

 

 

 

 

 

High Output Level

VOH

2.7

 

 

V

 

(IOUT=-500uA)

 

 

 

 

 

 

O8 Type Buffers

 

 

 

 

 

 

Low Output Level

VOL

 

 

0.4

V

IOL = 8mA

High Output Level

VOH

VDD33IO - 0.4

 

 

V

IOH = -8mA

O12 Type Buffers

 

 

 

 

 

 

Low Output Level

VOL

 

 

0.4

V

IOL = 12mA

High Output Level

VOH

VDD33IO - 0.4

 

 

V

IOH = -12mA

OD12 Type Buffer

 

 

 

 

 

 

Low Output Level

VOL

 

 

0.4

V

IOL = 12mA

ICLK Type Buffer (XI Input)

 

 

 

 

 

Note 5.9

Low Input Level

VILI

-0.3

 

0.5

V

 

High Input Level

VIHI

1.4

 

3.6

V

 

Note 5.6 This specification applies to all IS type inputs and tri-stated bi-directional non-PCI pins. Internal pull- down and pull-up resistors add +/- 50μA per-pin (typical)

Note 5.7 This buffer type adheres to Section 4.2.2 (3.3V Signaling Environment) of the PCI Local Bus Specification Revision 3.0. Device signals are NOT 5V tolerant. This device must not be used in a 5V PCI system, or connected to 5V logic without appropriate voltage level translation.

Note 5.8 This specification applies to all IPCI type inputs and tri-stated bi-directional PCI pins. Note 5.9 XI can optionally be driven from a 25MHz single-ended clock oscillator.

SMSC LAN9420/LAN9420i

159

Revision 1.22 (09-25-08)

 

DATASHEET