Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

4.4.1MAC Control Register (MAC_CR)

Offset:

0080h

Size:

32 bits

This register establishes the RX and TX operating modes and includes controls for address filtering and packet filtering.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31

Receive All Mode (RXALL)

R/W

0b

 

When set, all incoming packets will be received and passed on to the

 

 

 

address filtering function for processing of the selected filtering mode on the

 

 

 

received frame. Address filtering then occurs and is reported in Receive

 

 

 

Status. When reset, only frames that pass Destination Address filtering will

 

 

 

be sent to the Application.

 

 

 

 

 

 

30-24

RESERVED

RO

-

 

 

 

 

23

Disable Receive Own (RCVOWN)

R/W

0b

 

When set, the MAC disables the reception of frames when TXEN is

 

 

 

asserted. The MAC blocks the transmitted frame on the receive path. When

 

 

 

reset, the MAC receives all packets the PHY gives, including those

 

 

 

transmitted by the MAC.This bit should be reset when the Full Duplex Mode

 

 

 

bit is set.

 

 

 

 

 

 

22

RESERVED

RO

-

 

 

 

 

21

Loopback operation Mode (LOOPBK)

R/W

0b

 

Selects the loop back operation modes for the MAC. This is only for full

 

 

 

duplex mode

 

 

 

0 - Normal. No feedback

 

 

 

1 - Internal through MII

 

 

 

In internal loopback mode, the TX frame is received by the Internal MII

 

 

 

interface, and sent back to the MAC without being sent to the PHY.

 

 

 

Note: When enabling or disabling the loopback mode it can take up to

 

 

 

10μs for the mode change to occur. The transmitter and receiver

 

 

 

must be stopped and disabled when modifying the LOOPBK bit.

 

 

 

The transmitter or receiver should not be enabled within10μs of

 

 

 

modifying the LOOPBK bit.

 

 

 

 

 

 

20

Full Duplex Mode (FDPX)

R/W

0b

 

When set, the MAC operates in Full-Duplex mode, in which it can transmit

 

 

 

and receive simultaneously.

 

 

 

 

 

 

19

Pass All Multicast (MCPAS)

R/W

0b

 

When set, indicates that all incoming frames with a Multicast destination

 

 

 

address (first bit in the destination address field is 1) are received. Incoming

 

 

 

frames with physical address (Individual Address/Unicast) destinations are

 

 

 

filtered and received only if the address matches the MAC Address.

 

 

 

 

 

 

18

Promiscuous Mode (PRMS)

R/W

1b

 

When set, indicates that any incoming frame is received regardless of its

 

 

 

destination address.

 

 

 

 

 

 

17

Inverse filtering (INVFILT)

R/W

0b

 

When set, the address check Function operates in Inverse filtering mode.

 

 

 

This is valid only during Perfect filtering mode.

 

 

 

 

 

 

16

Pass Bad Frames (PASSBAD)

R/W

0b

 

When set, all incoming frames that passed address filtering are received,

 

 

 

including runt frames and collided frames.

 

 

 

 

 

 

SMSC LAN9420/LAN9420i

119

Revision 1.22 (09-25-08)

 

DATASHEET