Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

„Descriptor lists and data buffers, described in this chapter.

The DMAC transfers RX data frames to the RX buffers in Host memory and transmits data from TX buffers in the Host memory. Descriptors that reside in Host memory contain pointers to these buffers.

There are two DMA descriptor lists; one for receive operations and one for transmit operations. The base address of each list is written into the RX_BASE_ADDR and TX_BASE_ADDR registers, respectively. A descriptor list is forward linked (either implicitly or explicitly). Descriptors are usually placed in the physical memory in an incrementing and a contiguous addressing scheme. However, the last descriptor may point back to the first entry to create a ring structure. Explicit chaining of descriptors is accomplished by setting the Second Address Chained flag in both receive and transmit descriptors (RCH - RDES1[24] and TCH - TDES1[24]). Each descriptor's list resides in Host memory. Each descriptor can point to a maximum of two buffers. This enables the use of two physically addressed, as well as non-contiguous memory buffers.

Data buffers reside in the Host memory space. An Ethernet frame can be fragmented across multiple data buffers, but a data buffer cannot contain more than one Ethernet frame. Data chaining refers to Ethernet frames that span multiple data buffers. Data buffers contain only data used in the Ethernet frame. The buffer status is maintained in the descriptor. In a ring structure, each descriptor can point to up to two data buffers with the restriction that both buffers contain data for the same Ethernet frame. In a chain structure, each descriptor points to a single data buffer and to the next descriptor in the chain.

The DMAC will skip to the next frame buffer when end of frame is detected. Data chaining can be enabled or disabled. The ring and chain type descriptor structures are illustrated in Figure 3.15.

Note: Descriptors of zero buffer length are not supported at the initial and final descriptors of a chain.

SMSC LAN9420/LAN9420i

39

Revision 1.22 (09-25-08)

 

DATASHEET