Appendix B-2
Address | Chip in Use |
CA4-CA5 | IPMI (SMI interface) |
CA6-CA-7 | IPMI (SCI/SW1 interface) |
CD6 | Power management index register |
CD7 | Power management data register |
CF8, CFC | PCI configuration space |
CF9 | Reset control |
F50-F58h | General chipset |
BAR4+00-0F | EDMA2 PCI base address register 4 |
*Expressed in hexadecimal digits.
*I/O port addresses of PCI devices are specified based on the type and number of PCI devices.