CHAPTER 2 VR4120A
112 Preliminary User’s Manual S15543EJ1V0UM
Table 2-29. 32-bit Kernel Mode Segments
Address Bit Status Register Bit Value Segment Virtual Physical Size
Value KSU EXL ERL KX Name A ddress Address
A31 = 0 0 kuseg 0000_0000H
to
7FFF_FFFFH
TLB map 2 Gbytes
(231 bytes)
A(31:29) = 100 0 kseg0 8000_0000H
to
9FFF_FFFFH
0000_0000H
to
1FFF_FFFFH
512 Mbytes
(229 bytes)
A(31:29) = 101 0 kseg1 A000_0000H
to
BFFF_FFFFH
0000_0000H
to
1FFF_FFFFH
512 Mbytes
(229 bytes)
A(31:29) = 110 0 ksseg C000_0000H
to
DFFF_FFFFH
TLB map 512 Mbytes
(229 bytes)
A(31:29) = 111
KSU = 00
or
EXL = 1
or
ERL = 1
0 kseg3 E000_0000H
to
FFFF_FFFFH
TLB map 512 Mbytes
(229 bytes)
(1) kuseg (32-bit kernel mode, user space)
When KX = 0 in the Status register, and the most-significant bit of the virtual address space is 0, the kuseg virtual
address space is selected; it is the current 2-Gbyte (231-byte) user address space.
The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.
If the ERL bit of the Status register is 1, the user address space is assigned 2 Gbytes (231 bytes) without TLB
mapping and becomes unmapped (with virtual addresses being used as physical addresses) and uncached so
that the cache error handler can use it. This allows the Cache Error exception code to operate uncached using r0
as a base register.
(2) kseg0 (32-bit kernel mode, kernel space 0)
When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 100, the
kseg0 virtual address space is selected; it is the current 512-Mbyte (229-byte) physical space.
References to kseg0 are not mapped through TLB; the physical address selected is defined by subtracting 8000
0000H from the virtual address.
The K0 field of the Config register controls cacheability (see Section 2.5 Exception Processing).
(3) kseg1 (32-bit kernel mode, kernel space 1)
When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 101, the
kseg1 virtual address space is selected; it is the current 512-Mbyte (229-byte) physical space.
References to kseg1 are not mapped through TLB; the physical address selected is defined by subtracting A000
0000H from the virtual address.
Caches are disabled for accesses to these addresses, and main memory (or memory-mapped I/O device
registers) is accessed directly.
(4) ksseg (32-bit kernel mode, supervisor space)
When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 110, the
ksseg virtual address space is selected; it is the current 512-Mbyte (229-byte) virtual address space. The virtual
address is extended with the contents of the 8-bit ASID field to form a unique virtual address.