NEC uPD98502 Outline figure of Endian converter

CHAPTER 3 SYSTEM CONTROLLER
222 Preliminary User’s Manual S15543EJ1V0UM
31 0
78563412
31 0
7856 3412
2 bytes
Outline figure of Endian converter
31 0
78563412
31 0
78 56 34 12
1 byte
31 0
78563412
31 0
78563412
word
31 0
785634
31 0
785634
31 0
563412
31 0
563412
3 bytes
Big Endian: offset 0H
· ·
Little Endian: 0H
Big Endian: offset 1H
· ·
Little Endian: 1H
3.5.3 Endian Conversion on IBUS slave
“MSWP” bit on S_GMR register is enabler for endian converter that is located on space between memory interface
and IBUS slave interface, so this works only memory access via IBUS slave I/F. This converter is effective at the case
of address swap mode only. This converter performs following data operations.
Table 3-12. Endian Translation Table for the data swap mode (IBUS slave)
MSWP
on
GMR
Before Translation
input data[31:0]
in Data Phase
After Translation
output data[31:0]
in Data Phase
Remark
0 [31:0] [31:0] i.e. now
1 [31:24] [23:16] [15:8] [7:0] [7:0] [15:8] [23:16] [31:24] -
In the following Figure, Upper side is 4 octet data of memory I/F. And Under side is 4 octet data of IBUS slave I/F.
Outline figure of Endian converter
31 0
78563412
31 0
78 56 34 12