NEC uPD98502 300 , 5.3 Operation

CHAPTER 5 ETHERNET CONTROLLER
300 Preliminary User’s Manual S15543EJ1V0UM
5.3 Operation
5.3.1 Initialization
After a power on reset or a software reset, VR4120A has to set the following registers:
i) Interrupt Mask Registers
ii) Configuration Registers
iii) MII Management Registers
iv) Pool/Buffer Descriptor Registers
5.3.2 Buffer structure for Ethernet Controller block
The data buffer structure for Ethernet Controller is shown in Figure 5-4.
Figure 5-4. Buffer Structure for Ethernet Block
Buffer Descriptor
Buffer Descriptor
Buffer Descriptor
Link Pointer
Data Buffer
Data Buffer
Data Buffer
Buffer Descriptor
Buffer Descriptor
Buffer Descriptor
Link Pointer (null)
Data Buffer
Data Buffer
Data Buffer