Preliminary User’s Manual S15543EJ1V0UM 7
CONTENTS
CHAPTER 1 INTRODUCTION............................................................................................................... 23
1.1 Features...................................................................................................................................... 23
1.2 Ordering Information................................................................................................................. 23
1.3 System Configuration................................................................................................................24
1.4 Block Diagram (Summary)........................................................................................................25
1.5 Block Diagram (Detail)...............................................................................................................26
1.5.1 VR4120A RISC processor core......................................................................................................26
1.5.2 IBUS..............................................................................................................................................27
1.5.3 System controller...........................................................................................................................28
1.5.4 ATM cell processor........................................................................................................................29
1.5.5 Ethernet controller.........................................................................................................................30
1.5.6 USB controller............................................................................................................................... 31
1.5.7 PCI controller.................................................................................................................................32
1.6 Pin Configuration (Bottom View).............................................................................................33
1.7 Pin Function............................................................................................................................... 37
1.7.1 Power supply.................................................................................................................................37
1.7.2 System PLL power supply .............................................................................................................37
1.7.3 USB PLL power supply ..................................................................................................................37
1.7.4 System control interface................................................................................................................38
1.7.5 Memory interface...........................................................................................................................39
1.7.6 PCI interface..................................................................................................................................41
1.7.7 ATM interface................................................................................................................................43
1.7.8 Ethernet interface..........................................................................................................................45
1.7.9 USB interface................................................................................................................................ 46
1.7.10 UART interface ..............................................................................................................................47
1.7.11 Micro Wire interface.......................................................................................................................47
1.7.12 Parallel port interface.....................................................................................................................47
1.7.13 Boundary scan interface................................................................................................................47
1.7.14 I.C. – open.....................................................................................................................................48
1.7.15 I.C.– pull down...............................................................................................................................48
1.7.16 I.C. – pull down with resistor..........................................................................................................48
1.7.17 I.C. – pull up.................................................................................................................................. 48
1.8 I/O Register Map......................................................................................................................... 49
1.9 Memory Map............................................................................................................................... 53
1.10 Reset Conf iguration...................................................................................................................54
1.11 Interrupts.................................................................................................................................... 55
1.12 Clock Control Unit..................................................................................................................... 56
CHAPTER 2 VR4120A............................................................................................................................ 57
2.1 Overview for VR4120A ............................................................................................................... 57
2.1.1 Internal block configuration............................................................................................................58
2.1.2 VR4120A registers.........................................................................................................................59
2.1.3 VR4120A instruction set overview..................................................................................................60
2.1.4 Data formats and addressing.........................................................................................................61
2.1.5 Coprocessors (CP0)......................................................................................................................63