CHAPTER 4 ATM CELL PROCESSOR
Preliminary User’s Manual S15543EJ1V0UM 231
4.1.2.3 UTOPIA bus controller
This block has some H/W resources – DMA controller, FIFOs, CRC calculators/checkers. Its features are as
follows:
• Scatter/Gather-DMA controller that can operate the distributed data according to descriptor tables, without F/W
help. The DMA controller is used for each transmission and reception.
Normal DMA mode is also supported.
Furthermore, this DMA controller updates the information related to the DMA operations in the VC table in Work
RAM.
• Internal BUS interface(IBUS)
• ATM Zero-padding
Zero-padding is required in AAL-5 function. This block has the circuits for the padding. If the source address and
the number of bytes to be padded are gi ven, this block inserts zero padding as indicated.
• Transmission and reception SAR FIFO
UTOPIA I/F Control block has a four-cell-depth FIFO for each transmission and reception. The last cell in Tx
FIFO and the first cell in Rx FIFO are mapped to VR4120A RISC Processor/RISC Core memory space.
UTOPIA 2 I/F is an 8-bit bus I/F to PHY devices, which is defined in a ATM Forum document, “ATM-PHY-0039”.
UTOPIA MGR I/F will be supported as well.
Its features are as follows:
- It supports up to 15 PHY devices at a time. PHY addresses either from 0 through 14 or from 16 through 30
can be selected by setting command register.
- The first word of cell header and the last two words of payload can be read in Big-Endian byte in order to
insert/extract some special bit-fields.
- To avoid Head-of-line Blocking, later cells can pass earlier cells if their destination PHY devices are not
ready.
- In Rx side, it filters out idle cells and unassigned cells when it detects their pre-determined header patterns.
- It provides 3 different frequency clocks as Tx and Rx clocks. The frequency is defined by CLKUSL [1:0]
signals. In the case that 33 MHz clock is used SCLK, the frequency is determined as follows.
33 MHz: CLKUSL [1:0] = 00
16.5 MHz: CLKUSL [1:0] = 01
25 MHz: CLKUSL [1:0] = 10
No output: CLKUSL [1:0] = 11 (Do not set)
• CRC-32/CRC-10 calculator & checker
UTOPIA Bus Controller block has the CRC-32 calculator for each transmission and reception. CRC-32 value is
calculated for every packet. For transmission, CRC-32 value is inserted into the CRC-32 field in trailer. For
reception, CRC-32 value is compared with the value in the CRC-32 field in trailer, in order to check whether any
errors occurred or not.
UTOPIA Bus Controller block also has CRC-10 calculator for each transmission and reception. The user can
select whether CRC-10 is included in the payload or not. CRC-10 value is calculated for every cell. For
transmission, CRC-10 value is inserted into the last 10-bit area of the payload if selected. For reception, CRC-10
value is compared with the value in the last 10-bit of the payload if selected.