CHAPTER 6 USB CONTROLLER
Preliminary User’s Manual S15543EJ1V0UM 323
6.2.12 U_EP4CR (USB EP4 Control Register)This register is used for setting the operation of EndPoint4.If the value in the MAXP field is rewritten during receiving operation, the operation of USB Controller may becomeunpredictable. Therefore, the MAXP can be written only when initial setting is being performed.
Bits Field R/W Default Description
31 EP4EN R/W 0 EndPoint Enable:
When the VR4120A sets this bit to a ‘1’, EndPoint4 is enabled to receive data.
30:21 Reserved R/W 0 Reserved for future use. Writes ‘0’s.
20:19 RM4 R/W 0 Rx Mode:
Bit for setting the receive mode.
When these bits are set to ‘00’ or ‘01’, data receiving is performed in Normal
Mode.
When these bits are set to ‘10’, data receiving is performed in Assemble
Mode.
When these bits are set to ‘11’, data receiving is performed in Separate
Mode.
For a detailed explanation of the receive modes, see Section 6.6.4.
18 SS4 R/W 0 Transmit Stall:
When the VR4120A sets this bit to a ‘1’, a STALL handshake is performed at
EndPoint4.
17 NHSK4 R/W 0 No Handshake:
When the VR4120A sets this bit to a ‘1’, No Handshake is performed at
EndPoint4.
16 NAK4 R/W 0 When the VR4120A sets this bit to a ‘1’, a NAK Handshake is performed at
EndPoint4.
15:7 Reserved R/W 0 Reserved for future use. Writes ‘0’s.
6:0 MAXP4 R/W 0 MAX Packet size:
The Max Packet Size for EndPoint4. Prior to the start of a USB transaction,
the VR4120A must set an appropriate value into this register.