*PRE (Parallel Poll Enable Register Enable)
Command *PRE <mask>
The *PRE command sets the parallel poll register enable bits. The Parallel
Poll Enable Register contains a mask value that is ANDed with the bits in the
Status Bit Register to enable an "ist" during a parallel poll. Refer to table 8-4
for the bits in the Parallel Poll Enable Register and for what they mask.
<pre_mask> An integer from 0 to 65535.
Example This example will allow the 1660-series logic analyzers to generate an "ist"
when a message is available in the output queue. When a message is
available, the MAV (Message Available) bit in the Status Byte Register will be
high.
Output XXX;"* PRE 16"
Query *PRE?
The *PRE? query returns the current value of the register.
Returned format <mask><NL>
<mask> An integer from 0 through 65535 representing the sum of all bits that are set. .
Example OUTPUT XXX;"*PR E?"
Common Commands
*PRE (Parallel Poll Enable Register Enable)
8–13