Making a State Compare measurement
This program example acquires a state listing, copies the listing to the
compare listing, acquires another state listing, and compares both listings to
find differences.
This program is written in such a way you can run it with the E2433-60004
Logic Analyzer Training Board. This example is the same as the "State
Compare" example in chapter 3 of the E2433-90910 Logic Analyzer
Training Guide.
10 ! *********** STATE COMPARE EXAMPLE ********************************
20 ! for the 1660-Ser ies Logic Analyz ers
30 !
40 !
50 !************** SELECT THE LOGIC ANALYZER ************************
60 ! Select the module slot in which the logic analyzer is installed.
70 ! Always a 1 for the 1660A-series logic analyzers.
80 !
90 OUTPUT 707;":SE LECT 1"
100 !
110 !************** CONFIGURE THE STATE ANALYZER ***********************
120 ! Name Machine 1 "S TATE," configu re Machine 1 as a stat e analyzer, and
130 ! assign pod 1 to Machine 1.
140 !
150 OUTPU T 707;":MACH INE1:NAME ’STATE’"
160 OUTPUT 707;": MACHINE1:TYP E STATE"
170 OUTPUT 707;": MACHINE1:ASS IGN 1"
180 !
190 ! ******************************************************************
200 ! Remove all labels previously set up, make a label "SCOUNT," specify
210 ! positive logic, and assign the lower 8 bits of pod 1 to the label.
220 !
230 OUTPUT 707;": MACHINE1:SFO RMAT:REMOVE AL L"
240 OUTPU T 707;":MACH INE1:SFORMAT :LABEL ’SCOUNT’, POS, 0,0,25 5"
250 !
260 ! ******************************************************************
270 ! Make the "J" clock the Master clock and specify the falling edge.
280 !
290 OUTPUT 707;": MACHINE1:SFO RMAT:MASTER J, FALLING"
300 !
310 ! ******************************************************************
320 ! Spe cify two seq uence levels , the trigge r sequence l evel, specif y
Programming Examples
Making a State Compare measurement
36–9