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| USP Configuration |
Table 46: USP Configuration - Advanced Parameters (continued) | ||
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| Field | Description |
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| DTR | The port’s Data Terminal Ready status. Possible values are: |
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| ● Up - The port is physically prepared to transmit and receive |
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| packets. |
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| ● Down - The port is not physically prepared to transmit and |
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| receive packets. This generally indicates an error condition on |
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| the circuit. |
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| RTS | The port’s Ready To Send status. Possible values are: |
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| ● Up - The port is logically prepared to transmit and receive |
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| packets. |
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| ● Down - The port is not logically prepared to transmit and |
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| receive packets. This generally indicates an error condition |
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| either on the device or the circuit. |
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| CTS | The port’s Clear To Send status. Possible values are: |
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| ● Up - The port has successfully completed initial line signalling. |
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| CTS takes place at the end of the initial line signalling process |
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| and last for a short period of time. |
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| ● Down - The port has either failed to complete initial line |
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| signalling or the initial line signalling process has been |
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| completed. |
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| Invert Tx Clock | The state of the Tx clock. Possible states are: |
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| ● On - The Tx clock is inverted. |
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| ● Off - The Tx clock is not inverted. |
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| Ignore DCD | The signal type monitored to determine the interface’s status. |
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| Possible values are: |
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| ● On - The interface monitors DSR/CTS signals and ignores |
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| DCD signals. |
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| ● Off - The interface monitors DCD signals. |
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| Transmitter Delay | The delay between the CTS signal and the beginning of transmission. |
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| Loopback | The status of the DTE loopback. Possible values are: |
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| ● On - DTE loopback is enabled, indicating a line test taking |
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| place. |
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| ● Off - DTE loopback is disabled, indicating normal circuit |
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| operation. |
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| 2 of 2 |
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Issue 5 October 2007 131
