Cisco Systems UCSCPCIEBTG, 57712 Low Voltage DDR Mode, Dram Refresh rate, Channel Interleaving

BIOS Parameters by Server Model

Advanced BIOS Parameters for C22 and C24 Servers

Name	Description
Low Voltage DDR Mode	Whether the system prioritizes low voltage or high frequency
	memory operations. This can be one of the following:
	• —The system prioritizes low voltage memory operations
	over high frequency memory operations. This mode may
	lower memory frequency in order to keep the voltage low.
	• —The system prioritizes high frequency operations over
	low voltage operations.
DRAM Refresh rate	Allows you to set the rate at which the DRAM cells are
	refreshed. This can be one of the following:
	• 1x—DRAM cells are refreshed every 64ms.
	• 2x—DRAM cells are refreshed every 32ms.
	• 3x—DRAM cells are refreshed every 21ms.
	• 4x—DRAM cells are refreshed every 16ms.
Channel Interleaving	Whether the CPU divides memory blocks and spreads
	contiguous portions of data across interleaved channels to enable
	simultaneous read operations. This can be one of the following:
	• Auto—The CPU determines what interleaving is done.
	• —Some channel interleaving is used.
	•
	•
	• —The maximum amount of channel interleaving is used.
Rank Interleaving	Whether the CPU interleaves physical ranks of memory so that
	one rank can be accessed while another is being refreshed. This
	can be one of the following:
	• Auto—The CPU determines what interleaving is done.
	• —Some rank interleaving is used.
	•
	•
	• —The maximum amount of rank interleaving is used.

	Cisco UCS C-Series Servers Integrated Management Controller CLI Configuration Guide, Release 1.5
192	OL-28893-01