BIOS Parameters by Server Model

Advanced BIOS Parameters for C220 and C240 Servers

Name

Description

Adjacent Cache Line Prefetcher

Whether the processor fetches cache lines in even/odd pairs

 

instead of fetching just the required line. This can be one of the

 

following:

 

DisabledThe processor only fetches the required line.

 

EnabledThe processor fetches both the required line

 

and its paired line.

DCU Streamer Prefetch

Whether the processor uses the DCU IP Prefetch mechanism to

 

analyze historical cache access patterns and preload the most

 

relevant lines in the L1 cache. This can be one of the following:

 

DisabledThe processor does not try to anticipate cache

 

read requirements and only fetches explicitly requested

 

lines.

 

EnabledThe DCU prefetcher analyzes the cache read

 

pattern and prefetches the next line in the cache if it

 

determines that it may be needed.

DCU IP Prefetcher

Whether the processor uses the DCU IP Prefetch mechanism to

 

analyze historical cache access patterns and preload the most

 

relevant lines in the L1 cache. This can be one of the following:

 

DisabledThe processor does not preload any cache data.

 

EnabledThe DCU IP prefetcher preloads the L1 cache

 

with the data it determines to be the most relevant.

Direct Cache Access Support

Allows processors to increase I/O performance by placing data

 

from I/O devices directly into the processor cache. This setting

 

helps to reduce cache misses. This can be one of the following:

 

DisabledData from I/O devices is not placed directly

 

into the processor cache.

 

EnabledData from I/O devices is placed directly into

 

the processor cache.

 

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