1. Press (%?i) on the HP 8560A and set the controls as follows:

C E N T E R F R E Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...300 MHz SPAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OHz SWEEP TIME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5s D E T E C T O R M O D E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N O R M A L

2.Check LPOS-RST and LNEG-RST as described in “Peak Detector Reset.”

3.Check A3U423 pin 4 for two low-going 3.3 ~LS pulses 40 ps apart occurring every 130 ps.

4.Check that HROSENFELL (A3U610 pin 6) has two pulses spaced approximately 20 ms apart and then a third pulse 60 ms from the second pulse at 50 ms sweep time. Each pulse should be approximately 10 ms wide and low-going.

5.Monitor HROSENFELL with an oscilloscope while reducing the video bandwidth from

1MHz to 1 kHz.

6.As the video bandwidth is decreased to 1 kHz, the HROSENFELL line should increasingly show a low logic level. With a video bandwidth of 1 kHz, a nearly flat line should be displayed on the CRT.

7.Set the sweep time to 5 ms.

8.Check that HPOS_HLDNG (A3U416 pin 4) is mostly high with a 1 MHz video bandwidth and mostly low with a 1 kHz video bandwidth.

9.Check that HNEG_HLDNG (U416 pin 9) is mostly high with a 1 MHz video bandwidth and mostly low with a 1 kHz video bandwidth.

ADC MUX

See function block AA of A3 Interface Assembly Schematic Diagram (sheet 6 of 6).

The ADC MUX switches various inputs into the video path for conversion by the ADC. The SCAN RAMP input is used during non-zero-span sweeps. The YTO ERR, FCMUX, CAL OSC TUNE, and OFL ERR inputs are used only during diagnostic and auto adjust routines and during retrace.

1. Set the HP 8560A to the following settings:

C E N T E R F R E Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...300 MHz

SPAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OHz

REF LEVEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1OdBm

SWEEP TIME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..~OS

DETECTOR MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SAMPLE

2.Refer to Table 7-9 and check for correct logic levels at A3U108 pins 1, 15, and 16. Check for proper output signals at TP6. If the select lines are not changing, suspect the ADC ASM or the VGA/ADC MUX Control. If the select lines are changing, but the proper video inputs are not being switched to the output, replace U108.

3.Check for the presence of the YTO ERR signal at A3J2 pin 42 with an oscilloscope probe.

4.If ERR 300 YTO UNLK or 301 YTO UNLK occurs and the voltage is zero during a sweep and positive during retrace (YTO is being locked), the fault is on the A3 assembly. If a constant dc voltage is present, refer to the Synthesizer Section troubleshooting procedure.

ADC/lnterface Section 7-19