Teledyne M300EM operation manual J109

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J109

CH7

	5 10
C	RN14
	100Kx8

5 10 ANALOG INPUTS

-15V+15V

C55

+15V
R43	100

+15V

D

1
	CH6
2
	CH4
3
	CH3
4
	CH2
5
	CH1
6
7
8
9
10
11
12

MICROFIT-12

9

8

7

6

4

3

2 1

CH1

CH2

CH3

CH4

CH6

C

987643

		RN15
		100Kx8
				U52
2	1
			19	IN 1	OUT
			20
				IN 2
			21
				IN 3	+VSS
			22
				IN 4
			23
				IN 5	-VSS
			24
				IN 6
		CH7	25
				IN 7	GND
		CH8	26
				IN 8

0.15 uF, ceramic

28 3

C42

1 0.15 uF, ceramic 2

27
	C43	-15V
12	0.15 uF, ceramic

							C40
					0.15 uF, ceramic
	7
+	OP-AMP, PRECISION		R45 induces an
			offset in analog
	6	TC7	signal to give a
-					1M, 1%, 1206 CHIP
			'live 0' for sensors
				R45
			with 0 or slightly
	U53
			negative output
	4					3		2 1	20	19
					C44	U54

C41

+

10 uF, 35V, TANTALUM

VCC

D

J110

1

2

3

4

CH9

CH11

CH12

CH13

CH14

CH14

CH13

CH12

CH11

	11	IN 9	VREF
	10
		IN 10	NC
	9
		IN 11	NC
	8
		IN 12	ENB
	7
		IN 13	A3
	6
		IN 14	A2
	5
		IN 15	A1
	4
		IN 16	A0
1	TP3

13

2

3

18

14

15

16

17

VCC

NC

+VS

NC

REF NC

C46

.022 uF, 50V 4

OP OUT

COMP+

0.15 uF,

ceramic

5

U55

VCC

6

OP-

COMP-

OP+

AGND

DG444DY

7

5VI

OPT10V

GND

3

S1

D1

2

8

10VI

FOUT

14

S2

D2

15

100

R47

8VI

-VS

COS CLK

11

10

S3

D3

6

7

S4

D4

1

12

R48

200

IN1 VCC

	C45
18		+
17		10 uF, 35V, TANTALUM
16	R46

151.1K, 5%

VCC

C

B

5

6

7

8

9

10

11

12

MICROFIT-12

CH9

CH8

TEMPMUX

DACMUX

SHDN

U59A

1

CHGAIN

3

				AGND			AN MUX
		C47				U56
		1.2 uF, 6.3V ceramic
			8			NC		NC
			7
						NC		VIN
			6
						VOUT		NR
			5
						TRIM		GND
	TP1
1					VOLTAGE REF
	VREF
						VREF
TP49						TC6
					U58
1			1		74HC574
						OE
			11
						CLK
		D0	2
						D1		Q1
		D1	3
						D2		Q2
		D2	4
						D3		Q3
		D3	5
						D4		Q4
		D4	6
						D5		Q5
		D5	7
						D6		Q6
		D6	8
						D7		Q7

+15V

C48

1

2

3

41.2 uF, 6.3V ceramic

19

18

17

16

15

14

13

	16	IN2	-VS	4		9	10 11 12 13	AD652KP
	9			5
		IN3	GND
	8			13
		IN4	+VS
			+15V	C49
					R47 and R48 reduce the gain			TP48
			-15V	0.15 uF, ceramic
					for analog inputs by 1%, so
				R49
					that we can read slightly above
				100				1
					full scale, to prevent overflow
				-15V	of ADC reading			VCC
						D6	D5
	RN17		VCC			D2
	100Kx8
1		10		10 uF, 35V, TANTALUM	C50	6 5 4 3 2 1 44 43 42 41 40
2		5		+
3
4						RDLSB DB2	DB6 TIE TIE TIE DB5 VFCLK ICLK VCCINT TIE
6
7
8				D4	7
9				VCC	8	DB4
		C				RDMBYTE
				D3	9
						DB3
					10
						GND
				D7	11		U57
						DB7
				C51	12
						TIE
			0.15 uF, ceramic		13
						TIE
				D0	14
						DB0

		X2	C54
	JITO-2-DCA5AE-4.8MHZ
		6	0.15 uF, ceramic
			8
		1
PLACE 100			1	X1
		4		MB100H-4.8MHZ
OHM
			5
RESISTOR AS
CLOS AS		3
POSSIBLE TO
			4
X1 AND X2
R9	100
			TP57
			1
				TC8
TIE	39
	38
TIE
	37		VCC
TIE
	36
TIE
	35
FREQ
	34
TIE
	33
TIE
	32
VCCIO

C

B

IOW

2

74HC32

U59B

4

D7 9 D8 Q8

TP50

12

U60

74HC574

1

SEL60				15	TDI			Xilinx CPLD
				16
					TMS
				17
					TCK
D[0..7]						RDMSB TIE DB1 VCCINT IOR GND SA SB SC										READ START
TP51	TP52	TP53	TP54
					18		19	20	21	22	23	24	25	26	27		28

GND	31
TDO	30		C52
	29	SEL60	0.15 uF, ceramic
SEL60

TP55

A

VFPROG

6

IOW 5

74HC32

1

		OE
	11	CLK
D0	2	D1	Q1	19
D1	3			18
		D2	Q2
D2	4			17
		D3	Q3
D3	5			16
		D4	Q4
D4	6			15
		D5	Q5
D5	7			14
		D6	Q6
D6	8			13
		D7	Q7
D7	9			12
		D8	Q8

1	1	1	1	D1
SA
SB
SC
START
MSB
MID
LSB

1

IOR

VFREAD

Title	Schematic for E Series Motherboard PCA 05702
Size		Number		Revision
Orcad B		05703		A
Date:		17-Jun-2008	Sheet 4of	8

File: N:\Pcbmgr\05701dn.E-motherboard.gen4\SouDrawnce\05701aBy: .DDB

A

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