Parameter Description | Issue 01/06 |
P0290 | Inverter overload reaction |
| Min: | 0 | ||
| CStat: | CT | Datatype: U16 | Unit: - | Def: | 2 |
| INVERTER | Active: first confirm | QuickComm.: No | Max: | 3 |
Selects reaction of inverter to an internal
Following physical values influence the inverter overload protection (see diagram):
-heat sink temperature
-junction temperature (IGBT temperature)
-inverter I²t
Level
3
| Inverter monitoring | Inverter overload reaction |
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| P0290 |
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r0036 | i2t | i_max control | A0504 |
| P0294 | (U/f) |
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| Current control | A0505 |
r0037 | Heat sink | (SLVC, VC) |
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| A0506 | ||
temperature |
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| P0292 |
| F0004 |
| IGBT | f_pulse | |
| control |
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| temperature | F0005 | |
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| P0292 |
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Possible Settings:
0Reduce output frequency
1Trip (F0004)
2Reduce pulse frequency and output frequency
3Reduce pulse frequency then trip (F0004)
Notice:
P0290 = 0:
Reduction of output frequency is only effective if the load is also reduced. This is for example valid for variable torque applications with a quadratic torque characteristic as pumps or fans.
A trip will always result, if the action taken does not sufficiently reduce internal temperature.
The pulse frequency P1800 is reduced only if higher than 2 kHz. The actual pulse frequency is displayed in parameter r1801.
P0291[3] | Inverter protection |
|
| Min: | 0 | |
| CStat: | CT | Datatype: U16 | Unit: - | Def: | 1 |
| INVERTER | Active: Immediately | QuickComm.: No | Max: | 7 |
Level
4
Bit 02 shows if phase loss dedection (input phase) of 3 phase inverters is enabled after factory reset. Default setting of phase loss is disabled for FSA - FSC. FSD and greater it is enabled.
Bitfields: |
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Bit00 | Reserved | 0 | NO | 1 | YES |
Bit01 | Reserved | 0 | NO | 1 | YES |
Bit02 | Phase loss detection enable | 0 | NO | 1 | YES |
Index: |
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P0291[0] : 1st. Drive data set (DDS)
P0291[1] : 2nd. Drive data set (DDS)
P0291[2] : 3rd. Drive data set (DDS)
Details:
See P0290 (inverter overload reaction)
48 | MICROMASTER 440 Parameter List |