CY7C67300
Device n Endpoint n Status Register [R/W]
■Device n Endpoint 0 Status Register [Device 1: 0x0206 Device 2: 0x0286]
■Device n Endpoint 1 Status Register [Device 1: 0x0216 Device 2: 0x0296]
■Device n Endpoint 2 Status Register [Device 1: 0x0226 Device 2: 0x02A6]
■Device n Endpoint 3 Status Register [Device 1: 0x0236 Device 2: 0x02B6]
■Device n Endpoint 4 Status Register [Device 1: 0x0246 Device 2: 0x02C6]
■Device n Endpoint 5 Status Register [Device 1: 0x0256 Device 2: 0x02D6]
■Device n Endpoint 6 Status Register [Device 1: 0x0266 Device 2: 0x02E6]
■Device n Endpoint 7 Status Register [Device 1: 0x0276 Device 2: 0x02F6]
Table 66. Device n Endpoint n Status Register
Bit # | 15 | 14 |
| 13 | 12 | 11 | 10 | 9 | 8 |
Field |
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| Reserved |
| Overflow | Underflow | OUT | IN | |
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| Flag | Flag | Exception Flag | Exception Flag | |
Read/Write | - | - |
| - | - | R/W | R/W | R/W | R/W |
Default | X | X |
| X | X | X | X | X | X |
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Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Field | Stall | NAK | Length | Setup | Sequence | Timeout | Error | ACK |
Flag | Flag | Exception Flag | Flag | Flag | Flag | Flag | Flag | |
Read/Write | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Default | X | X | X | X | X | X | X | X |
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Register Description
The Device n Endpoint n Status register provides packet status information for the last transaction received or transmitted. This register is updated in hardware and does not need to be cleared by firmware. There are a total of eight endpoints for each of the two ports. All endpoints have the same definition for their Device n Endpoint n Status register.
The Device n Endpoint n Status register is a memory based register that must be initialized to 0x0000 before USB Device operations are initiated. After initialization, do not write to this register again.
Overflow Flag (Bit 11)
The Overflow Flag bit indicates that the received data in the last data transaction exceeded the maximum length specified in the Device n Endpoint n Count register. The Overflow Flag must be checked in response to a Length Exception signified by the Length Exception Flag set to ‘1’.
1:Overflow condition occurred
0:Overflow condition did not occur
Underflow Flag (Bit 10)
The Underflow Flag bit indicates that the received data in the last data transaction was less then the maximum length specified in the Device n Endpoint n Count register. The Underflow Flag must be checked in response to a Length Exception signified by the Length Exception Flag set to ‘1’.
1:Underflow condition occurred
0:Underflow condition did not occur
OUT Exception Flag (Bit 9)
The OUT Exception Flag bit indicates when the device received an OUT packet when armed for an IN.
1:Received OUT when armed for IN
0:Received IN when armed for IN
IN Exception Flag (Bit 8)
The IN Exception Flag bit indicates when the device received an IN packet when armed for an OUT.
1:Received IN when armed for OUT
0:Received OUT when armed for OUT
Stall Flag (Bit 7)
The Stall Flag bit indicates that a Stall packet was sent to the host.
1:Stall packet was sent to the host
0:Stall packet was not sent
NAK Flag (Bit 6)
The NAK Flag bit indicates that a NAK packet was sent to the host.
1:NAK packet was sent to the host
0:NAK packet was not sent
Length Exception Flag (Bit 5)
The Length Exception Flag bit indicates the received data in the data stage of the last transaction does not equal the maximum Endpoint Count specified in the Device n Endpoint n Count register. A Length Exception can either mean an overflow or
Document #: | Page 41 of 99 |
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