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CY7C67300
Pin Diagram
Figure 11. EZ-Host Pin Diagram
A1
A2
A3
DM2B
DP2B
AGND
A4
A5
DM2A
DP2A
OTGVBUS CSWITCHB CSWITCHA VSWITCH BOOSTGND BOOSTVCC A6 DM1B DP1B A7 AVCC DM1A DP1A A8 A9
nBEL/A0 GND
100 99 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 | 27 | |
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GND |
| A10 |
nBEH | A16 | A17 | A18 | GPIO0/D0 | GPIO1/D1 | GPIO2/D2 | GPIO3/D3 | GPIO4/D4 | GPIO5/D5 | VCC | GPIO6/D6 | GPIO7/D7 | nRESET | Reserved | D0 | D1 | D2 | D3 | D4 | D5 | D6 | D7 |
98 | 97 | 96 | 95 | 94 | 93 | 92 | 91 | 90 | 89 | 88 | 87 | 86 | 85 | 84 | 83 | 82 | 81 | 80 | 79 | 78 | 77 | 76 |
75
74
73
72
71
70
69
68
67
66
65
CY7C6730064
63
62
61
60
59
58
57
56
55
54
53
52
51
28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | ||||||||||||||||||||||||||||||||||||||
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XTALOUT | XTALIN |
| A11 |
| A12 |
| A13 |
| A14 |
| nXMEMSEL | nXROMSEL | nXRAMSEL |
| VCC |
| A15/CLKSEL |
| GPIO31/SCL | GPIO30/SDA | GPIO29/OTGID |
| GPIO28/TX | GPIO27/RX |
| GPIO26/CTS/PWM3 |
| GPIO25/IRQ1 |
| GPIO24/INT/IORDY/IRQ0 |
| GPIO23/nRD/IOR |
| GPIO22/nWR/IOW |
| GPIO21/nCS |
| GPIO20/A1/CS1 |
GND D8/MISO D9/nSSI D10/SCK D11/MOSI D12/TXD D13/RXD D14/RTS D15/CTS GPIO8/D8/MISO GPIO9/D9/nSSI nWR
VCC nRD GPIO10/D10/SCK GPIO11/D11/MOSI GPIO12/D12 GPIO13/D13 GPIO14/D14 GPIO15/D15/nSSI GPIO16/A0/TXD/PWM0 GPIO17/A1/RXD/PWM1 GPIO18/A2/RTS/PWM2 GPIO19/A0/CS0
GND
Pin Descriptions
Table 131. Pin Descriptions |
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Pin | Name | Type | Description |
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67 | D15/CTS | IO | D15: External Memory Data Bus |
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| CTS: HSS CTS |
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68 | D14/RTS | IO | D14: External Memory Data Bus |
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| RTS: HSS RTS |
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69 | D13/RXD | IO | D13: External Memory Data Bus |
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| RXD: HSS RXD (Data is received on this pin) |
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70 | D12/TXD | IO | D12: External Memory Data Bus |
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| TXD: HSS TXD (Data is transmitted from this pin) |
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Document #: |
| Page 79 of 99 |
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