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Cypress CY7C67300 manual Hss

Models: CY7C67300

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CY7C67300

Table 142.

Register Summary (continued)

R/W

Address

Register

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default High

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default Low

R/W

0xC00C

Watchdog Timer

Reserved...

0000 0000

...Reserved

Timeout

Period

Lock

WDT

Reset

0000 0000

Flag

Select

Enable

Enable

Strobe

R/W

0xC00E

Interrupt Enable

Reserved

OTG Interrupt

SPI Interrupt

Reserved

Host/Device 2

Host/Device 1

0000 0000

Enable

Enable

Interrupt

Interrupt

Enable

Enable

HSS

In Mailbox

Out Mailbox

Reserved

UART

GPIO

Timer 1

Timer 0

0001 0000

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Enable

Enable

Enable

Enable

Enable

Enable

Enable

R/W

0xC098

OTG Control

Reserved

VBUS

Receive

Charge Pump

VBUS

D+

D–

0000 0000

Pull-up

Disable

Enable

Discharge

Pull-up

Pull-up

Enable

Enable

Enable

Enable

D+ Pulldown

D– Pull-down

Reserved

OTG Data

ID

VBUS Valid

0000 0xxx

Enable

Enable

Status

Status

Flag

R/W

0: 0xC010

Timer n

Count...

1111 1111

1: 0xC012

...Count

1111 1111

R/W

0xC014

Breakpoint

Address...

0000 0000

...Address

0000 0000

R/W

1: 0xC018

Extended Page n Map

Address...

0000 0000

2: 0xC01A

...Address

0000 0000

R/W

0: 0xC01E

GPIO n Output Data

Data...

0000 0000

1: 0xC024

...Data

0000 0000

R

0: 0xC020

GPIO n Input Data

Data...

0000 0000

1: 0xC026

...Data

0000 0000

R/W

0: 0xC022

GPIO n Direction

Direction Select...

0000 0000

1: 0xC028

...Direction Select

0000 0000

R/W

0xC038

Upper Address Enable

Reserved

xxxx xxxx

Reserved

Upper

Reserved

xxxx 0xxx

Address

Enable

R/W

0xC03A

External Memory Control

Reserved

XRAM

XROM

XMEM

XMEM

xxxx xxxx

Merge Enable

Merge Enable

Width Select

Wait Select

XROM

XROM

XRAM

XRAM

xxxx xxxx

Width Select

Wait Select

Width Select

Wait Select

R/W

0xC03C

USB Diagnostic

Port 2B

Port 2A

Port 1B

Port 1A

Reserved...

0000 0000

Diagnostic

Diagnostic

Diagnostic

Diagnostic

Enable

Enable

Enable

Enable

...Reserved

Pull-down

LS Pull-up

FS Pull-up

Reserved

Force Select

0000 0000

Enable

Enable

Enable

W

0xC03E

Memory Diagnostic

Reserved

Memory

0000 0000

Arbitration

Select

Reserved

Monitor

0000 0000

Enable

R/W

0xC048

IDE Mode

Reserved...

0000 0000

...Reserved

Reserved

Mode Select

0000 0000

R/W

0xC04A

IDE Start Address

Address...

0000 0000

... Address

0000 0000

R/W

0xC04C

IDE Stop Address

Address...

0000 0000

...Address

0000 0000

R/W

0xC04E

IDE Control

Reserved...

0000 0000

...Reserved

Direction

IDE Interrupt

Done

IDE

0000 0000

Select

Enable

Flag

Enable

-

0xC050-0

IDE PIO Port

xC06E

R/W

0xC070

HSS Control

HSS

RTS

CTS

XOFF

XOFF

CTS

Receive

Done

0000 0000

Enable

Polarity

Polarity

Enable

Enable

Interrupt

Interrupt

Select

Select

Enable

Enable

TransmitDone

Receive Done

One

Transmit

Packet Mode

Receive

Receive Pack-

Receive

0000 0000

Interrupt Flag

Interrupt Flag

Stop Bit

Ready

Select

Overflow Flag

et Ready Flag

Ready Flag

R/W

0xC072

HSS Baud Rate

Reserved

HSS Baud...

0000 0000

...Baud

0001 0111

R/W

0xC074

HSS Transmit Gap

Reserved

0000 0000

Transmit Gap Select

0000 1001

R/W

0xC076

HSS Data

Reserved

xxxx xxxx

Data

xxxx xxxx

R/W

0xC078

HSS Receive Address

Address...

0000 0000

...Address

0000 0000

R/W

0xC07A

HSS Receive Counter

Reserved

Counter...

0000 0000

...Counter

0000 0000

R/W

0xC07C

HSS Transmit Address

Address..

0000 0000

...Address

0000 0000

Document #: 38-08015 Rev. *J

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Cypress CY7C67300 manual Hss

Contents

EZ-Host Features CY7C67300 Block DiagramTypical Applications Introduction Functional OverviewInterface Descriptions USB Interface Interface Options for External Memory Bus Pins MEM PinsUSB Interface Pins Pin Name Pin Number OTG Interface Pins Pin Name Pin NumberOTG Interface External Memory Interface External Memory Interface Pins Pin Name Pin Number External Memory Interface PinsExternal Memory Interface Block Diagrams Up to 256k x 16 External Code/Data Page ModeUart Interface General Purpose IO Interface GpioI2C Eeprom Interface Serial Peripheral InterfaceProgrammable Pulse/PWM Interface High-Speed Serial InterfaceHPI Interface Pins 3 HPI Interface Pins 3 Pin Name Pin NumberHost Port Interface IDE InterfaceIDE Interface Pins Pin Name Pin Number IDE Throughput ModeCharge Pump Interface Pins Pin Name Pin Number ActualCrystal Pins Booster PinsCrystal Pins Pin Name Pin Number Booster InterfaceBoot Configuration Interface Boot Configuration InterfaceBoot Mode Operational ModesPower Savings and Reset Description Power Saving Mode DescriptionSleep Memory Map Document # 38-08015 Rev. *JPage 15 Bank Selected 0xC018 0xC01AProcessor Control Registers RegistersBank Register Example Hex Value Binary Value Bank RegisterReserved Revision RegisterCPU Speed Definition Processor Speed Host/Device 2B Wake Enable Bit Power Control RegisterHost/Device 2A Wake Enable Bit Host/Device 1B Wake Enable BitInterrupt Enable Register Halt Enable Bit Sleep Enable BitOTG Interrupt Enable Bit SPI Interrupt Enable BitMailbox Interrupt Enable Bit HSS Interrupt Enable BitOut Mailbox Interrupt Enable Bit Uart Interrupt Enable BitPort 2B Diagnostic Enable Bit USB Diagnostic RegisterPort 2A Diagnostic Enable Bit Port 1B Diagnostic Enable BitExternal Memory Registers Upper Address Enable Bit Upper Address Enable Register 0xC038 R/WExtended Page n Map Register R/W Extended Page n Map RegisterTimer Registers Timeout Flag Bit Watchdog Timer RegisterLock Enable Bit WDT Enable BitGeneral USB Registers Timer n RegisterUSB n Control Register Port B D+ Status BitPort B Resistors Enable Bit Mode Select BitPort a Resistors Enable Bit EnablePreamble Enable Bit Port a SOF/EOP Enable Bit ReservedUSB Host Only Registers USB Host Only Register Register Name Address Host 1/HostHost n Address Register ISO Enable Bit Sync Enable BitArm Enable Bit Sequence Select BitUnderflow Flag Bit Port Select BitStall Flag Bit NAK Flag BitSequence Status Bit Error Flag BitHost n PID Register W Host n PID RegisterPID Select PID Select DefinitionHost n Count Result Register R Host n Count Result Register Endpoint Select BitsVbus Interrupt Enable Bit Host n Interrupt Enable RegisterID Interrupt Enable Bit Host n Device Address RegisterPort B Wake Interrupt Enable Bit SOF/EOP Interrupt Enable BitPort a Wake Interrupt Enable Bit Port B Connect Change Interrupt Enable BitPort B Wake Interrupt Flag Bit SOF/EOP Interrupt Flag BitPort a Wake Interrupt Flag Bit Port B Connect Change Interrupt Flag BitHost n SOF/EOP Counter Register Host n SOF/EOP Counter Register RHost n Frame Register R Host 1 Frame Register 0xC096 Host 2 Frame Register 0xC0B6USB Device Only Registers IN/OUT Ignore Enable BitDevice n Endpoint n Control Register R/W Device n Endpoint n Control RegisterNAK Interrupt Enable Bit Stall Enable BitEnable Bit Direction Select BitDevice n Endpoint n Count Register Device n Endpoint n Count Register R/WDevice n Endpoint n Status Register Device n Endpoint n Status Register R/WOUT Exception Flag Bit Exception Flag BitSequence Flag Bit Setup Flag BitDevice n Endpoint n Count Result Register R/W Device n Endpoint n Count Result RegisterDevice n Interrupt Enable Register Port Select Bit Device n Interrupt Enable Register R/WDevice n Port Select Register R/W Device n Port Select RegisterReset Interrupt Enable Bit SOF/EOP Timeout Interrupt Enable BitEP7 Interrupt Enable Bit EP6 Interrupt Enable BitDevice n Address Register W EP0 Interrupt Enable BitDevice n Address Register Device n Status Register R/WEP7 Interrupt Flag Bit Reset Interrupt Flag BitEP6 Interrupt Flag Bit EP5 Interrupt Flag BitSOF/EOP Timeout Interrupt Counter Bits SOF/EOP Timeout Flag BitEP2 Interrupt Flag Bit EP1 Interrupt Flag BitOTG Control Registers Vbus Pull-up Enable BitDevice n SOF/EOP Count Register OTG Control Register ReservedGpio Registers SAS Enable Bit Write Protect Enable BitMode Select Definition Gpio Configuration 108 HSS Enable BitInterrupt 0 Polarity Select Bit Reserved Interrupt 0 Enable BitGpio n Output Data Register Gpio n Input Data RegisterIDE Registers Mode Select Definition IDE Start Address Register 0xC04A R/WIDE Start Address Register IDE Enable Bit IDE Interrupt Enable BitIDE Stop Address Register IDE Control RegisterHSS Registers IDE PIO Port Registers 0xC050 0xC06F R/WHSS Registers Register Name Address CTS Enable Bit Xoff Enable BitReceive Interrupt Enable Bit HSS Control RegisterTransmit Ready Bit Packet Mode Select BitReceive Overflow Flag Bit HSS Baud Rate RegisterHSS Transmit Gap Register HSS Transmit Gap Register 0xC074 R/WTransmit Gap Select Bits HSS Data Register 0xC076 R/WHSS Receive Counter Register HSS Receive Counter Register 0xC07A R/WHSS Transmit Address Register HSS Transmit Address Register 0xC07C R/WHSS Transmit Counter Register 0xC07E R/W HSS Transmit Counter RegisterHPI Registers Vbus to HPI Enable BitHPI Breakpoint Register HPI Registers Register Name Address Interrupt Routing RegisterSOF/EOP2 to HPI Enable Bit ID to HPI Enable BitSOF/EOP2 to CPU Enable Bit SOF/EOP1 to HPI Enable BitSIE1msg Register SIE2msg Register SIEXmsg Register WSIEXmsg Register HPI Mailbox Register 0xC0C6 R/WHPI Status Port Reset2 Flag BitVbus Flag Bit ID Flag BitSPI Registers Reset1 Flag BitDone1 Flag Bit Mailbox Out Flag BitPhase Select Bit 3Wire Enable BitMaster Active Enable Bit Master Enable BitRead Enable Bit Byte Mode BitSPI Control Register SCK Strobe BitTransmit Interrupt Enable Bit SPI Interrupt Enable RegisterTransfer Interrupt Enable Bit Fifo Error Flag BitTransmit Interrupt Flag Bit Receive Interrupt Flag BitSPI Interrupt Clear Register Transfer Interrupt Flag BitCRC Enable Bit CRC Mode Definition CRCMode CRC Polynomial 1514CRC Clear Bit SPI CRC Value Register Receive CRC BitSPI Data Register SPI Data Register 0xC0D6 R/WSPI Transmit Address Register 0xC0D8 R/W SPI Transmit Address RegisterSPI Transmit Count Register SPI Receive Address RegisterSPI Receive Count Register Uart Registers Uart Status Register Uart Status Register 0xC0E2 RReceive buffer full Receive buffer empty Uart Data Register 0xC0E4 R/WPWM Registers PWM Enable BitPWM Registers Register Name Address PWM Control RegisterPWM 2 Enable Bit PWM 3 Enable BitPWM 1 Enable Bit PWM 0 Enable BitPWM n Start Register PWM n Start Register R/WPWM n Stop Register R/W PWM n Stop RegisterPWM Cycle Count Register PWM Cycle Count Register 0xC0FA R/WPin Diagram Pin DescriptionsPin Descriptions Name Type Mosi SPI Mosi D11/MOSISCK SPI SCK D8/MISOGPIO28/TX GPIO29/OTGIDGPIO27/RX GPIO26/CTS/PWM3Tie to Gnd for normal operation Booster Power input 2.7V toAbsolute Maximum Ratings DC CharacteristicsOperating Conditions Crystal Requirements XTALIN, XtaloutGND USB TransceiverAC Timing Characteristics Reset TimingClock Timing Sram Read Cycle15 Sram Read Cycle Parameters Description Min Typical Max UnitLOW Sram Write Cycle Parameters Sram Write CycleParameter Description Min Typical Max Unit HighI2C Eeprom Timing-Serial IO SCLSDA OUT HPI Host Port Interface Write Cycle Timing HPI Host Port Interface Read Cycle Timing Chip Select Hold Data Access Time, from HPInRD fallingRead Pulse Width Read Cycle TimeHSS Block Mode Transmit HSS Byte Mode TransmitHSS Byte and Block Mode Receive IDE TimingRegister Summary Hardware CTS/RTS HandshakeRegister Summary HSS SOF/EOP CRC SOF/EOP2 Ordering Information Package DiagramsOrdering Information Ordering Code Package Type Pb-FreeOrig. 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