CY7C67300
Table 112. CRC Mode Definition
CRCMode | CRC Polynomial | |
[15:14] | ||
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00MMC 16 bit: X^16 + X^12 + X^5 + 1(CCITT Standard)
01 | CRC7 7 bit: X^7+ X^3 + 1 |
10MST 16 bit: X^16+ X^15 + X^2 + 1
11Reserved, 16 bit polynomial 1
CRC Enable (Bit 13)
The CRC Enable bit enables or disables the CRC operation.
1:Enables CRC operation
0:Disables CRC operation
CRC Clear (Bit 12)
The CRC Clear bit clears the CRC with a load of all ones. This bit is self clearing and always reads ‘0’.
1:Clear CRC with all ones
0:No Function
SPI CRC Value Register [0xC0D4] [R/W]
Table 113. SPI CRC Value Register
Receive CRC (Bit 11)
The Receive CRC bit determines whether the receive bit stream or the transmit bit stream is used for the CRC data input in full duplex mode. This bit is a don’t care in half duplex mode.
1:Assigns the receive bit stream
0:Assigns the transmit bit stream
One in CRC (Bit 10)
The One in CRC bit is a read only bit that indicates if the CRC value is all zeros or not
1:CRC value is not all zeros
0:CRC value is all zeros
Zero in CRC (Bit 9)
The Zero in CRC bit is a read only bit that indicates if the CRC value is all ones or not.
1:CRC value is not all ones
0:CRC value is all ones
Reserved
Write all reserved bits with ’0’.
Bit # | 15 | 14 | 13 | 12 |
| 11 | 10 | 9 | 8 |
Field |
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| CRC... |
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Read/Write | R/W | R/W | R/W | R/W |
| R/W | R/W | R/W | R/W |
Default | 1 | 1 | 1 | 1 |
| 1 | 1 | 1 | 1 |
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Bit # | 7 | 6 | 5 | 4 |
| 3 |
| 2 | 1 | 0 |
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Field |
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| ...CRC |
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Read/Write | R/W | R/W | R/W | R/W |
| R/W |
| R/W | R/W | R/W |
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Default | 1 | 1 | 1 | 1 |
| 1 |
| 1 | 1 | 1 |
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Register Description |
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| CRC (Bits [15:0]) |
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The SPI CRC Value register contains the CRC value. |
| The CRC field contains the SPI CRC. In CRC Mode CRC7, the | |||||||||
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| CRC value is a seven bit value [6:0]. Therefore, bits [15:7] are | ||||||
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| invalid in CRC7 mode. |
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Document #: | Page 70 of 99 |
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