Cypress CY7C67300 manual HPI Host Port Interface Write Cycle Timing

CY7C67300

HPI (Host Port Interface) Write Cycle Timing

		tCYC
tASU	tWP	tAH
ADDR [1:0]
tCSSU		tCSH
nCS
nWR
nRD
Dout [15:0]
	tDSU	tWDH

Table 140. HPI Write Cycle Timing Parameters

Parameter	Description	Min	Typical	Max	Unit
tASU	Address Setup	–1			ns
tAH	Address Hold	–1			ns
tCSSU	Chip Select Setup	–1			ns
tCSH	Chip Select Hold	–1			ns
tDSU	Data Setup	6			ns
tWDH	Write Data Hold	2			ns
tWP	Write Pulse Width	2			T[18]
tCYC	Write Cycle Time	6			T[18]

Notes

18. T = system clock period = 1/48 MHz.

Document #: 38-08015 Rev. *J Page 89 of 99

[+] Feedback