Cypress CY7C67300 manual External Memory Registers

								CY7C67300
Memory Diagnostic Register [0xC03E] [W]
Table 33. Memory Diagnostic Register
Bit #	15	14	13	12	11	10	9		8
			Reserved				Memory
Field							Arbitration
							Select
Read/Write	-	-	-	-	-	W	W		W
Default	0	0	0	0	0	0	0		0
Bit #	7	6	5	4	3	2	1		0
Field				Reserved					Monitor
									Enable
Read/Write	-	-	-	-	-	-	-		W
Default	0	0	0	0	0	0	0		0

Register Description

The Memory Diagnostic register provides control of diagnostic modes.

Memory Arbitration Select (Bits[10:8])

The Memory Arbitration Select field is defined in Table 34.

Table 34. Memory Arbitration Select

Memory Arbitration	Memory Arbitration Timing
Select [3:0]
111	1/8, 7 of every 8 cycles dead
110	2/8, 6 of every 8 cycles dead
101	3/8, 5 of every 8 cycles dead
100	4/8, 4 of every 8 cycles dead
011	5/8, 3 of every 8 cycles dead
010	6/8, 2 of every 8 cycles dead
001	7/8, 1 of every 8 cycles dead
000	8/8, all cycles available

Monitor Enable (Bit 0)

The Monitor Enable bit enables or disables monitor mode. In monitor mode the internal address bus is echoed to the external address pins.

1:Enable monitor mode

0:Disable monitor mode

Reserved

Write all reserved bits with ’0’.

External Memory Registers

There are four registers dedicated to controlling the external memory interface. Each of these registers are covered in this section and are summarized in Table 35.

Table 35. External Memory Control Registers

Register Name	Address	R/W
Extended Page 1 Map Register	0xC018	R/W
Extended Page 2 Map Register	0xC01A	R/W
Upper Address Enable Register	0xC038	R/W
External Memory Control Register	0xC03A	R/W

Document #: 38-08015 Rev. *J Page 23 of 99

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