2.4 System Board Troubleshooting

2 Troubleshooting Procedures

Table 2-4 Debug port (Boot mode) error status (4/8)

D port status

Inspection items

Details

 

 

Forwards the area of C0000h to EFFFFh to

 

 

PCI (prohibition of DRAM)

 

 

 

 

 

Sets resume error request

 

 

 

 

Copying ROM/RAM of system

(When error occurred, it halts.)

 

BIOS

 

 

F104h

SMRAM initialization

 

 

 

 

 

WakeUp factor check

 

 

SMRAM base rewriting and

 

 

CPU state map saving for

 

 

BIOS

 

 

Permission of SMI based on

 

 

ASMI

 

F105h

Initialization of devices which

PIT test (at Cold boot only) and initialization

 

need initialization before PCI

Setting of test pattern to channel 0 of PIT#0

 

bus initialization

Check whether the set test pattern can be

 

 

read.

 

 

Initialization of PIT channel 0

 

 

(Setting of timer interruption interval to 55ms)

 

 

Initialization of PIT channel 2

 

 

(Setting of the sound generator frequency to

 

 

664Hz)

 

 

Test of PIT channel 1

 

 

(Check whether the refresh signal works normally

 

 

in 30 micro-s refresh interval)

 

 

(The system halts when the time is out.)

 

 

Test of PIT channel 2

 

 

(Check if the speaker gate works properly.)

 

 

CPU clock measurement

 

 

 

 

 

Check of parameter block A

 

 

 

 

 

Permission of SMI except auto-off function

 

 

 

 

 

Control on excess of rated input power

 

 

 

 

 

Battery discharge current control (1CmA)

 

 

 

 

 

AC adapter rated over current control

 

 

 

 

 

Dividing procedures for time measuring by IRT

 

 

 

 

 

Setting for clock generator

 

 

 

 

 

CPU Initialization

 

 

Update of micro code

 

 

Judge of CPU type

 

 

Geyserville support check

 

 

Setting of CPU clock to “high"

 

 

Graphics Aperture Size setting

 

 

 

2-24

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QOSMIO G20 Maintenance Manual (960-511)

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Toshiba QOSMIO G20 manual Debug port Boot mode error status 4/8, Bios