Devices’ Features and Data Paths | FPGA |
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SLEDs
SVersion register
Serial Interface
The FPGA provides routing options of one of the two serial interfaces provided by the Southbridge. This feature is intended for Motorola−internal purposes and should be ignored. .a
Reset Mask and Source Register
The FPGA provides two registers which allow to obtain the last reset source and to mask resets. Seeasection "Reset Registers" on pagea139.a
Flash Control Register
The FPGA provides one register which allows to monitor the boot and user flash write−protection status as well as to control the write−protection of the boot flash boot block. Seeasection "Flash Control and Status Register" on pagea141
PMC Status Register
The FPGA provides one register which allows to monitor the status of the four PMC sites. Seeasection "PMC Status Register" on pagea143
Shut−Down Register
The FPGA provides one register which allows to control the blades’ FRU−EN signal. Seeasection "Shut Down Register" on pagea143
LEDs
The FPGA provides a register to control the HDD LED available at the face plate. This LED indicates the combined parallel and serial ATA activity or is operated in user LED mode. Seeasection "LED Control Register" on pagea142.a
Version Register
This register allows to obtain the current FPGA version. Seeasection "Version Register" on pagea147.a
118 | PENT/ATCA−717 |
