Architecture

Real-time performance

Cache Lock Function: Lock one set of the two-way set associative cache memory to keep data in cache memory

Debug support

Breakpoint

Single step execution

Real-time debug system interface

1.1.3Low power consumption

Power Down mode

Prepare for Reduced Frequency mode: Control the clock frequency of the R3900 Processor Core with a clock generator

Halt and Doze mode: Stop R3900 Processor Core operations

Clock can be stopped

Clock signal can be stopped at high state

1.1.4Development environment for embedded arrays and cell-based ICs

Compact core

Easy-to-design peripheral circuits

Single direction separate bus: Bus configuration suitable for core

Built-in cache memory: No need to consider cache operation timing

ASIC Process

Sufficient Development Environment

4

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Toshiba TX39 user manual Low power consumption