Toshiba TX39 NIS Non-maskable Interrupt Status, OES Other Exceptions Status, SSt Single at reset

Architecture

nNIS (Non-maskable Interrupt Status)

This bit is set to 1 when a Non-maskable interrupt occurs at the same time as a debug exception. In this case the Status, Cause, EPC and BadVAddr registers assume their usual status after the occurrence of a Non-maskable interrupt, but the address in DEPC is not the non-maskable interrupt exception vector address (0xBFC0 0000).

Instead, 0xBFC0 0000 is put in DEPC by the debug exception handler software, after which processing returns directly from the debug exception to the Non-maskable interrupt handler.

nOES (Other Exceptions Status)

This bit is set to 1 when an exception other than reset, NmI or UTLB Refill occurs at the same time as a debug exception. In this case the Status, Cause, EPC and BadVAddr registers assume their usual status after the occurrence of such an exception, but the address in DEPC will not be the other exception vector address. Instead, 0xBFC0 0180 (if the Status register BEV bit is 1) or 0x8000 0080 (if BEV is 0) is put in DEPC by the debug exception handler software, after which processing returns directly from the debug exception to the other exception handler.

(Note: Only one of bits NIS, or OES is set, according to the priority of exceptions.)

nTLF (TLB Exception Flag)

This bit is set to 1 when a TLB-related exception (TLB Refill, UTLB Refill, Mod) occurs for the immediately preceding load or store instruction while a debug exception handler is running (DM bit = 1).

(Note: A check should be made as to whether a TLB-related exception has occurred or not each time access is made to the user area data.)

nBsF (Bus Error Exception Flag)

This bit is set to 1 when a bus error exception occurs for a load or store instruction while a debug exception handler is running (DM bit = 1). It is cleared by writing 0 to it.

nSSt (Single Step) (0 at reset)

This bit indicates whether the single step debug function is enabled (set to 1) or disabled (cleared to 0). The function is disabled when the DM bit is set to 1, i.e., while a debug exception handler is running. This bit is a read/write bit.

nDBp (bit 1)

Set to 1 to indicate a Debug Breakpoint exception.

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