Toshiba TX39 user manual Swl

Architecture

SWL

Store Word Left SWL

31	26 25	21 20	16 15	0
	SWL	base	rt	offset
	101010
	6	5	5	16

Format :

SWL rt, offset(base)

Description :

Used together with SWR to store the contents of a register into four consecutive bytes of memory when the bytes cross a word boundary. SWL stores the left part of the register into the appropriate part of the high-order word in memory; SWR stores the right part of the register into the appropriate part of the low-order word in memory.

This instruction generates a 32-bit effective address that can point to any byte by sign-extending the 16-bit offset and adding it to the contents of general-purpose register base. Only the one word in memory containing the designated starting byte is modified. Depending on the starting byte, from one to four bytes are stored.

The concept is illustrated below. This instruction (SWL) starts from the high-order (left-most) byte of the register and stores it into the designated memory byte; it then continues storing bytes from register to memory, proceeding toward the low-order byte of the register and the low-order byte of the memory word, until it reaches the low-order byte of the memory word.

No Address Error instruction is raised due to misalignment.

Memory

	(Big endian)
Before	Address 4	4	5	6	7
storing	Address 0	0	1	2	3
					SWL $24,1($0)
After	Address 4	4	5	6	7
storing
	Address 0	0	A	B	C

Register

A B C D $24

188