Architecture

BGEZL

Branch On Greater Than Or Equal To Zero Likely

BGEZL

 

31

26 25

21 20

16 15

0

 

 

BCOND

 

rs

 

 

BGEZL

 

offset

 

 

 

 

 

 

 

 

 

 

000001

 

 

 

 

00011

 

 

 

 

6

5

 

 

5

 

16

 

Format :

BGEZL rs, offset

Description :

Generates a branch target address by adding the address of the instruction in the delay slot to the 16- bit offset (that has been left-shifted two bits and sign-extended to 32 bits). If the sign bit of the value in general-purpose register rs is 0 (i.e., the value is positive or 0), the program branches to the target address after a one-cycle delay. If the branch is not taken, the instruction in the delay slot is treated as a NOP.

Operation :

T:

target (offset )14

offset 02

 

15

 

 

condition (GPR[rs]31 = 0)

T + 1:

if condition then

 

PC PC + target

else

NullifyCurrentInstruction

endif

Exceptions :

None

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Toshiba TX39 user manual Bgezl