Architecture
163
MTCz Move To Coprocessor MTCz
31 26 25 21 20 16 15 11 10 0
COPz
0100xx*
MT
00100 rt rd 0
000 0000 0000
6 5 5 5 11
Format :
MTCz rt, rd
Description :
Loads the contents of general-purpose register rt into coprocessor z register rd.
Operation :
T: CPR[z, rd] ← GPR[rt]
Exceptions :
Coprocessor Unusable exception
* Operation Code Bit Encoding :
MTCz Bit No. 31 30 29 28 27 26 25 24 23 22 21 0
COP0 01000000100
Bit No. 31 30 29 28 27 26 25 24 23 22 21 0
COP1 01000100100
Bit No. 31 30 29 28 27 26 25 24 23 22 21 0
COP2 01001000100
Bit No. 31 30 29 28 27 26 25 24 23 22 21 0
COP3 01001100100
coprocessor sub-opcodecoprocessor unit no.opcode