Architecture
196
Bit Encoding of CPU Instruction Opcodes

Figure A-2 shows the bit codes for all CPU instructions (ISA and extended ISA).

OPcode

28..26
31..29 0 1 2 3 4 5 6 7
0SPECIAL BCOND JJAL BEQ BNE BLEZ BGTZ
1ADDI ADDIU SLTI SLTIU ANDI ORI XORI LUI
2COP0 COP1 COP2 COP3 BEQLδBNELδBLEZLδBGTZLδ
3* * * * MADD/
MADDUδ* * *
4LB LH LWL LW LBU LHU LWR *
5SB SH SWL SW * * SWR CACHEδ
6*ξ ξ ξ * * * *
7*ξ ξ ξ * * * *

SPECIAL function

2.0
5..3 0 1 2 3 4 5 6 7
0SLL *SRL SRA SLLV *SRLV SRAV
1JR JALR * * SYSCALL BREAK SDBBPδSYNCδ
2MFHI MTHI MFLO MTLO * * * *
3MULT MULTU DIV DIVU * * * *
4ADD ADDU SUB SUBU AND OR XOR NOR
5* * SLT SLTU * * * *
6* * * * * * * *
7* * * * * * * *

BCOND

18..16
20..19 0 1 2 3 4 5 6 7
0BLTZ BGEZ BLTZLχBGEZLχγ γ γ γ
1γ γ γ γ γ γ γ γ
2BLTZAL BGEZAL BLTZALLχBGEZALLχγ γ γ γ
3γ γ γ γ γ γ γ γ

COPz rs

23..21
25,24 0 1 2 3 4 5 6 7
0MF γCF γMT γCT γ
1BC γ γ γ γ γ γ γ
2
3CO

Figure A-2. Operation Code Bit Encoding