Architecture

BNE

Branch On Not Equal

BNE

 

31

26 25

21 20

16 15

0

 

 

 

BNE

 

rs

 

rt

 

offset

 

 

 

 

 

 

 

 

 

 

000101

 

 

 

 

 

 

 

 

 

6

 

5

 

5

 

16

 

Format :

BNE rs, rt, offset

Description :

Generates a branch target address by adding the address of the instruction in the delay slot to the 16- bit offset (that has been left-shifted two bits and sign-extended to 32 bits). The contents of general registers rs and rt are compared and, if not equal, the program branches to the target address after a one-cycle delay.

Operation :

T:

target (offset )14

offset 02

 

15

 

 

condition (GPR[rs] GPR[rt])

T + 1:

if condition then

 

 

PC PC + target

 

endif

Exceptions :

None

130

Page 141
Image 141
Toshiba TX39 user manual Bne