Architecture
122
BGTZ Branch On Greater Than Zero BGTZ
31 26 25 21 20 1615 0
BGTZ
000111 rs 0
00000 offset
6 5 5 16
Format :
BGTZ rs, offset
Description :
Generates a branch target address by adding the address of the instruction in the delay slot to the 16-
bit offset (that has been left-shifted two bits and sign-extended to 32 bits). If the value in general-
purpose register rs is positive (i.e., the sign bit of rs is 0 and the rs value is not 0), the program
branches to the target address after a one-cycle delay.
Operation :
T:
T + 1:
target ← (offset 15)14 || offset || 02
condition ← (GPR[rs]31 = 0) and (GPR[rs] ≠ 032)
if condition then
PC ← PC + target
endif
Exceptions :
None