IFB Register Mapping

9.3Universal Serial Bus (USB) Configuration

The IFB integrates an USB Controllers. The USB Controller is UHCI 1.1 compliant. It implements the root hub of the USB, which contains two ports.

The IFB PCI function 2 reflects both the Universal Serial Bus Host and Root Hubs, with 2 connected USB ports.

9.3.1PCI Configuration Registers (Function 2)

Table 9-3. PCI Configuration Registers–Function 2 (USB Interface)

Configuration Offset

Mnemonic

Register

Register Access

 

 

 

 

00–01h

VID

Vendor Identification

RO

 

 

 

 

02–03h

DID

Device Identification

RO

 

 

 

 

04–05h

PCICMD

PCI Command

R/W

 

 

 

 

06–07h

PCISTS

PCI Device Status

R/W

 

 

 

 

08h

RID

Revision Identification

RO

 

 

 

 

09-0Bh

CLASSC

Class Code

RO

 

 

 

 

0Ch

–

Reserved

–

 

 

 

 

0Dh

MLT

Latency Timer

R/W

 

 

 

 

0Eh

HEDT

Header Type

RO

 

 

 

 

0F–1Fh

–

Reserved

–

 

 

 

 

20–23h

USBBA

USB I/O Space Base Address

R/W

 

 

 

 

24–3Bh

–

Reserved

–

 

 

 

 

3Ch

INTLN

Interrupt Line

R/W

 

 

 

 

3Dh

INTPN

Interrupt Pin

RO

 

 

 

 

3E–5Fh

–

Reserved.

–

 

 

 

 

60h

SBRNUM

Serial Bus Release Number

RO

 

 

 

 

61–69h

–

Reserved

–

 

 

 

 

6A–6Bh

MCR

Miscellaneous Control Register

R/W

 

 

 

 

6C–BFh

–

Reserved

–

 

 

 

 

C0–C1h

LEGSUP

USB Legacy Keyboard/Mouse Control

R/W

 

 

 

 

C2-C3h

---

Reserved

-----

 

 

 

 

C4h

USBRES

USB Resume Enable

R/W

 

 

 

 

C5-F3h

–

Reserved

–

 

 

 

 

F4-F7h

–

Reserved

–

 

 

 

 

F8-FBh

–

Manufacturer’s ID Register

–

 

 

 

 

FC-FFh

–

Reserved

–

 

 

 

 

9-4

Intel® 460GX Chipset Software Developer’s Manual