Intel 460GX 3.8.1Slot Power-upand Enable, 3.8.2Slot Power-downand Disable

System Architecture

3.8.1Slot Power-up and Enable

To power-up a PCI slot, software sets a command bit in a register. Then the hot-plug logic performs the following steps:

1.Set PWREN active to the slot and clock the parallel latch.

2.Set CLKEN# active to the slot but do not clock the parallel latch.

3.Wait 200 msec for slot power to stabilize, except in test mode.

4.Gain ownership of the PCI bus through arbitration.

5.Clock the parallel latch.

6.Release ownership of the bus after 480 nsec.

7.Set RESET# inactive to the slot but do not clock the parallel latch.

8.Wait 200 msec for slot clock to stabilize, except in test mode.

9.Gain ownership of the PCI bus through arbitration.

10.Clock the parallel latch.

11.Release ownership of the bus after 480 nsec.

12.Set BUSEN# active to the slot but do not clock the parallel latch.

13.Wait 1000 msec for PCI card initialization, except in test mode.

14.Gain ownership of the PCI bus through arbitration.

15.Clock the parallel latch.

16.Release ownership of the bus after 480 nsec.

3.8.2Slot Power-down and Disable

To power-down a PCI slot, software sets a command bit in a register. Then the hot-plug logic performs the following steps:

1.Set BUSEN# inactive to the slot but do not clock the parallel latch.

2.Gain ownership of the PCI bus through arbitration.

3.Clock the parallel latch.

4.Release ownership of the bus after 480 nsec.

5.Set RESET# active to the slot but do not clock the parallel latch.

6.Gain ownership of the PCI bus through arbitration.

7.Clock the parallel latch.

8.Release ownership of the bus after 480 nsec.

9.Set CLKEN# inactive to the slot but do not clock the parallel latch.

10. Gain ownership of the PCI bus through arbitration.

11. Clock the parallel latch.

12. Release ownership of the bus after 480 nsec.

13. Set PWREN inactive to the slot and clock the parallel latch.

Intel® 460GX Chipset Software Developer’s Manual 3-7