Intel 460GX manual 5 GXB, 5.1, Ferrpci, Ferragp First Error Status Register for AGP

Register Descriptions

2.4.5GXB

2.4.5.1	FERR_GXB
	Function Number:	BFN+1
	Address Offset:	80h	Size:	8 bits
	Default Value:	00h	Attribute:	Read/Write Clear
	Sticky:	Yes	Locked:	No

These registers record the first error detected by the GXB. For the order to clear this register with respect to the other GXB error registers.

Bits Description

7:3 reserved (0)

2FERR_PCI bit asserted

1FERR_AGP bit asserted

0 FERR_GART bit asserted

2.4.5.2FERR_PCI

Function Number:	BFN+1
Address Offset:	84h	Size:	8 bits
Default Value:	00h each	Attribute:	Read/Write Clear
Sticky:	Yes	Locked:	No

These registers record the first error detected in GPI.

Bits Description

7PCISTS Error Logged

This bit is asserted when an error, except for a master abort, has been logged in the PCI Status register.

6Non-Configuration Master Abort

This bit is asserted when a master abort occurs on any transaction other than a configuration read or configuration write.

reported the same as a master abort - see PCISTS register

5Discard Timer Expiration This is the 215 clock timeout.

4SERR# Observed

3PERR# Observed

2PCI Inbound Read Que Data Parity Error

Parity error detected as read data is retrieved from buffer.

1PCI Outbound Write Que Data Parity Error

Parity error detected as write data is retrieved from buffer.

0Illegal OB GART Access

Access may continue or abort, results undefined.

2.4.5.3FERR_AGP: First Error Status Register for AGP

Function Number:	BFN+1
Address Offset:	85h	Size:	8 bits
2-24	Intel®	460GX Chipset Software Developer’s Manual