7.2

AGP Traffic

7-6

 

 

7.2.1

Addresses Used by the Graphics Card

7-6

 

 

7.2.2

Traffic Priority

7-7

 

 

7.2.3

Coherency, Translation and Types of AGP Traffic

7-7

 

 

7.2.4

Ordering Rules

7-8

 

 

7.2.5

Processor Locks and AGP Traffic

7-8

 

 

7.2.6

Address Alignment and Transfer Sizes

7-9

 

 

7.2.7

PCI Semantics Traffic

7-9

 

7.3

Bandwidth

7-13

 

 

7.3.1

Inbound Read Prefetching

7-14

 

7.4

Latency

.............................................................................................................

7-14

 

7.5

GXB Address Map

7-14

8

WXB Hot-Plug

8-1

 

8.1

IHPC Configuration Registers

8-1

 

 

8.1.1

Page Number List for the IHPC PCI Register Descriptions

8-3

 

 

8.1.2

VID: Vendor Identification Register

8-3

 

 

8.1.3

DID: Device Identification Register

8-3

 

 

8.1.4

PCICMD: PCI Command Register

8-4

 

 

8.1.5

PCISTS: PCI Status Register

8-5

 

 

8.1.6

RID: Revision Identification Register

8-5

 

 

8.1.7

CLASS: Class Register

8-6

 

 

8.1.8

CLS: Cache Line Size

8-6

 

 

8.1.9

MLT: Master Latency Timer Register

8-6

 

 

8.1.10

HDR: Header Register

8-6

 

 

8.1.11

Base Address

8-7

 

 

8.1.12

SVID: Subsystem Vendor Identification

8-7

 

 

8.1.13

SID: Subsystem ID

8-7

 

 

8.1.14

Interrupt Line

8-7

 

 

8.1.15

Interrupt Pin

8-8

 

 

8.1.16

Hot-Plug Slot Identifier

8-8

 

 

8.1.17

Miscellaneous Hot-Plug Configuration

8-8

 

 

8.1.18

Hot-Plug Features

8-9

 

 

8.1.19

Switch Change SERR Status

8-9

 

 

8.1.20

Power Fault SERR Status

8-9

 

 

8.1.21

Arbiter SERR Status

8-10

 

 

8.1.22

Memory Access Index

8-10

 

 

8.1.23

Memory Mapped Register Access Port

8-10

 

8.2

IHPC Memory Mapped Registers

8-10

8.2.1Page Number List for IHPC Memory Mapped Register Descriptions..8-12

8.2.2

Slot Enable

8-12

8.2.3

Hot-Plug Miscellaneous

8-13

8.2.4

LED Control

8-13

8.2.5

Hot-Plug Interrupt Input and Clear

8-14

8.2.6

Hot-Plug Interrupt Mask

8-15

8.2.7

Serial Input Byte Data

8-16

8.2.8

Serial Input Byte Pointer

8-17

8.2.9

General Purpose Output

8-17

8.2.10

Hot-Plug Non-interrupt Inputs

8-17

8.2.11

Hot-Plug Slot Identifier

8-17

8.2.12

Hot-Plug Switch Interrupt Redirect Enable

8-18

8.2.13

Slot Power Control

8-18

vi

Intel® 460GX Chipset System Software Developer’s Manual

Page 6
Image 6
Intel 460GX manual Latency